GaAs power MESFETs prepared by metalorganic chemical vapour deposition

Shino, T.; Yanagawa, S.; Yamada, Yuki; Arai, K.; Kamei, K.; Chigira, T.; Nakanisi, Takatosi

doi:10.1049/el:19810519

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Fet Ciiip Desighn and Fabrication1

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1982

1990

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Cited by 8 publications

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“…The power FET chips with large gate width have to be fabricated to offer a good uniformity accross a large-area wafers. The drain saturation current (Idss) distributions of the 7.2 mm gate width FET have been evaluated for VPE and MOCVD wafers by Toshiba [2]. The standard deviation can be reduced by the Microwave Solid-state department, Komukai works, Toshiba Corporation 72 Horikawa-cho, Saiwaiku, Kawasaki 210, Japan.…”

Section: Fet Ciiip Desighn and Fabricationmentioning

confidence: 99%