GAPSYS: A GA-based Tool for Automated Passive Analog Circuit Synthesis

Das, Angan; Vemuri, Ranga

doi:10.1109/iscas.2007.378519

Cited by 9 publications

(1 citation statement)

References 4 publications

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“…Starting with passive filter synthesis (see [DV07,CHS06]), switched capacitor filter synthesis [AEBD00], low noise amplifier synthesis [TB08,BKN04,TB05], low drop out circuits [DM09] to ∆Σ-synthesis [TD06]. Assistant based tools were also investigated, which support and guide the designer through the development of an analog circuit [SKP05].…”

Section: State-of-the-art In Analog Synthesismentioning

confidence: 99%

FEATS: Framework for Explorative Analog Topology Synthesis

Meißner

Hedrich

2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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The presented work inside this thesis aims to raise the degree of automation in analog circuit design. Therefore, a framework was developed to provide the necessary mechanisms in order to carry out a fully automated analog circuit synthesis, i.e., the construction of an analog circuit fulfilling all previously defined (electrical) specifications.Nowadays, analog circuit design in general is a very time consuming process compared to a digital design flow. Due to its discrete nature, the digital design process is highly automated and thus very efficient compared to analog circuit design. In modern Very-Large-Scale integration (VLSI) circuits the analog parts are mostly just a small portion of the overall chip area. Although this small portion is known to consume a major part of the needed workforce. Paired with product cycles which constantly get shorter, the time needed to develop the analog parts of an integrated circuit (IC) becomes a determinant factor. Apart from this, the ongoing progress in semiconductor processing technologies promises more speed with less power consumption on smaller areas, forcing the IC developers to keep track with the technology nodes in order to maintain competitiveness. Analog circuitry exhibits the inherent property of being hard to reuse, as porting from one technology node to another imposes critical changes for operating conditions (e.g., supply voltage) -mostly leading to a full redesign for most of the analog modules. This productivity gap between digital and analog design resembles the primary motivation for this thesis.Due to the availability of commercial sizing tools, this work deliberately focuses on the construction of circuit topologies in distinction to parameter synthesis, which can be obtained with a dedicated sizing tool. The focus on circuit construction allows the development of a framework which allows a full design space exploration. This thesis describes the needed concepts and methods to realize a deterministic, explorative analog synthesis framework. Despite this, a reference implementation is presented, which demonstrates the applicability in current analog design flows. circuit (c) a circuit representing a physical realization circuits (C) an unordered set of circuits design space (DS) design space seen as crossproduct of P S and ST S devices (M ) an unordered set of devices equivalence class (eqcls) an unordered set of objects sharing the combination set of invariant properties equivalence classes (EQCLS(c)) set of equivalence classes associated with the circuit c graph (G) a representation of object vertices connected through edges ground (V GN D ) name of the reference net or simply ground hash (hash(x)) hash associated with object x integer (N) integer numbers invariant properties (EQP ROP S(x)) set of invariant properties associated with x invariant property (p) a property associated with a specific IV i invariants (IV) an unordered set of invariants label (L(x)) label associated with object x nets (N ) an unordered set of nets parameter space ...

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Section: State-of-the-art In Analog Synthesismentioning

confidence: 99%

FEATS: Framework for Explorative Analog Topology Synthesis

Meißner

Hedrich

2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Reverse-Engineering Nonlinear Analog Circuits with Evolutionary Computation

Cornforth

Lipson

2014

Unconventional Computation and Natural Computation

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A novel tree-based representation for evolving analog circuits and its application to memristor-based pulse generation circuit

Shi

Minku

Yao

2022

Genet Program Evolvable Mach

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When applying evolutionary algorithms to circuit design automation, circuit representation is the first consideration. There have been several studies applying different circuit representations. However, they still have some problems, such as lack of design ability, which means the diversity of evolved circuits was limited by the circuit representation, and inefficient transformation from circuit representation into SPICE (Simulation Program with Integrated Circuit Emphasis) netlist. In this paper, a novel tree-based circuit representation for analog circuits is proposed, which is equipped with an intuitive and three-terminal devices friendly mapping rule between circuit representation and SPICE netlist, as well as a suitable crossover operator. Based on the proposed representation, a framework for automated analog circuit design using genetic programming is proposed to evolve both the circuit topology and device values. Three benchmark circuits are applied to evaluate the proposed approach, showing that the proposed method is feasible and evolves analog circuits with better fitness and number of components while using less fitness evaluations than existing approaches. Furthermore, considering physical scalability limits of conventional circuit elements and the increased interest in emerging technologies, a memristor-based pulse generation circuit is also evolved based on the proposed method. The feasibility of the evolved circuits is verified by circuit simulation successfully. The experiment results show that the evolved memristive circuit is more compact and has better energy efficiency compared with existing manually-designed circuits.

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GAPSYS: A GA-based Tool for Automated Passive Analog Circuit Synthesis

Cited by 9 publications

References 4 publications

FEATS: Framework for Explorative Analog Topology Synthesis

FEATS: Framework for Explorative Analog Topology Synthesis

Reverse-Engineering Nonlinear Analog Circuits with Evolutionary Computation

A novel tree-based representation for evolving analog circuits and its application to memristor-based pulse generation circuit

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