Gate Characterization Using Singular Value Decomposition: Foundations and Applications

Wei, Sheng; Nahapetian, Ani; Nelson, Michael; Koushanfar, Farinaz; Potkonjak, Miodrag

doi:10.1109/tifs.2011.2181500

Cited by 16 publications

(7 citation statements)

References 40 publications

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“…Trusted monitor chips stacked on top of an untrusted chip using through-silicon vias (TSVs) may be used to actively detect attacks [49] or selected wires may be lifted (using TSVs) to a secure layer to obfuscate a design [106]. Large TSV pitch can lead to area inefficiencies [50] [84] are estimated, and Trojans are identified. GLC shares the limitations of other fingerprinting techniques (e.g., [89] VIII.…”

Section: B Tpad Vs Other Techniquesmentioning

confidence: 99%

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-There are increasing concerns about possible malicious modifications of integrated circuits (ICs) used in critical applications. Such attacks are often referred to as hardware Trojans. While many techniques focus on hardware Trojan detection during IC testing, it is still possible for attacks to go undetected. Using a combination of new design techniques and new memory technologies, we present a new approach that detects a wide variety of hardware Trojans during IC testing and also during system operation in the field. Our approach can also prevent a wide variety of attacks during synthesis, place-and-route, and fabrication of ICs. It can be applied to any digital system, and can be tuned for both traditional and split-manufacturing methods. We demonstrate its applicability for both ASICs and FPGAs. Using fabricated test chips with Trojan emulation capabilities and also using simulations, we demonstrate: 1. The area and power costs of our approach can range between 7.4-165% and 0.07-60%, respectively, depending on the design and the attacks targeted; 2. The speed impact can be minimal (close to 0%); 3. Our approach can detect 99.998% of Trojans (emulated using test chips) that do not require detailed knowledge of the design being attacked; 4. Our approach can prevent 99.98% of specific attacks (simulated) that utilize detailed knowledge of the design being attacked (e.g., through reverse-engineering). 5. Our approach never produces any false positives, i.e., it does not report attacks when the IC operates correctly. I. INTRODUCTION HERE is growing concern about the trustworthiness of integrated circuits (ICs). If an untrusted party fabricates an IC, there is potential for an adversary to insert a malicious hardware Trojan [1], an unauthorized modification of the IC resulting in incorrect functionality and/or sensitive data being exposed [2]. These include (but are not limited to) [3]: a) Modification of functional behavior through logic changes: Index TermsFor example, extra logic gates may be inserted to force an incorrect logic value on a wire at some (arbitrary) point in time (Fig. 1a) [2]. b) Electrical modification: For example, extra capacitive loading may be placed on a circuit path to alter timing characteristics of the IC (Fig. 1b) [2]. c) Reliability degradation: For example, aging of transistors (e.g., Negative Bias Temperature Instability (NBTI)) may be accelerated, degrading reliability ( Fig. 1c) [4]. A hardware Trojan is detected when we report malicious modifications to an IC. A hardware Trojan is prevented when Manuscript received January 9, 2015; revised May 8, 2015; accepted July 20, 2015. Work supported by IARPA Trusted Integrated Chips (TIC) Program. All authors are with Dept. of Electrical Engineering, Stanford University, Stanford, CA 94305 USA (e-mail: tonyfwu@stanford.edu). S. Mitra is also with Dept. of Computer Science, Stanford University.we stop a hardware Trojan from being inserted. Part of the challenge in detecting or preventing hardware Trojans arises from the fact that...

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Section: B Tpad Vs Other Techniquesmentioning

confidence: 99%

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…In [1,7,8] the authors used a coordinate Figure 2: Taxonomie based on [17] system transformation by the principal components in order to identify altered circuit designs based on simulations. Another proposed method to identify a Trojan signature in a noisy measurement distribution is to use singular value decomposition [24]. Both methods were evaluated under the assumption of a golden chip scenario and the circuits were simulated based on a circuit-design simulator, for instance SPICE.…”

Section: Trojan Detectionmentioning

confidence: 99%

Hardware trojan design and detection

Kutzner

Pöschmann

Stöttinger

2013

Proceedings of the Workshop on Embedded Systems Security

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Hardware Trojan design and detection have been extensively studied during the last years. In this work we investigate non-invasive detection methods utilizing so-called side-channel analysis. In the past, almost all proposed detection techniques have been evaluated based on simulations only and thus, the question remains how well they perform in practice. Therefore, we perform a practical evaluation of two previously published Trojan detection methods based on principal component analysis. We evaluate those methods on various designs of a complete functional lightweight hardware Trojan embedded in a PRESENT block cipher circuit. More precisely, we investigate how well the simulations match our practical results and reveal some shortcomings. Subsequently, we introduce a new detection method exploiting statistical properties of the probability distribution functions built from side-channel measurements and show that it is more robust to measurement noise than previously presented methods.

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“…The key idea is that each SRAM cell has a high probability that it is initialized to some value, either 0 or 1, after each power-up. Although the "stability " of the SRAM PUF cells has always been a problem, recently, it has been experimentally demonstrated that the use of device aging [20][21] [22], specifically hot carrier injection (HCI) [23] [24], can completely eliminate this problem.…”

Section: A Pufmentioning

confidence: 99%

Lightweight digital hardware random number generators

Potkonjak

2013

2013 Ieee Sensors

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Abstract-Random Number Generator (RNG) plays an essential role in many sensor network systems and applications, such as security and robust communication. We have developed the first digital hardware random number generator (DHRNG). DHRNG has a small footprint and requires ultra-low energy. It uses a new recursive structure that directly targets efficient FPGA implementation. The core idea is to place or extract random values in FPGA configuration bits and randomly connect the building blocks. We present our architecture, introduce accompanying protocols for secure public key communication, and adopt the NIST randomness test on the DHRNG's output stream.

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Gate Characterization Using Singular Value Decomposition: Foundations and Applications

Cited by 16 publications

References 40 publications

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Hardware trojan design and detection

Lightweight digital hardware random number generators

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