Time Dependent Dielectric Breakdown (TDDB) is one of the major indices to evaluate the Gate Oxide Integrity (GOI) reliability of Integrated Circuit (IC) devices. Permutation and combination theory helps to derive the many combinations of temperature and voltage stress levels to determine TDDB parameters (i.e., and Ea) with a pre-specified sample size. In this work, a statistical tool (JMP10) with optimal experimental design platform for accelerated life test (ALT) is employed to select stressing conditions, to optimize the ALT test plan with a special distribution of sample size for each stressing condition, to model parameter estimation, and to predict lifetimes. Comparing our proposed DOE method to the most popular conventional method, we find our DOE method is better from both theoretical and experimental standpoints. Based on this study, we propose an optimized combination of stressing conditions and sample size allocation for each stress condition. Our proposed method saves capacity, shortens half of the test time, and obtains a narrower confidence interval (CI) of the estimated TDDB lifetime.