2013
DOI: 10.1109/ted.2013.2254490
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Geometry, Temperature, and Body Bias Dependence of Statistical Variability in 20-nm Bulk CMOS Technology: A Comprehensive Simulation Analysis

Abstract: Abstract-Conventional bulk CMOS, which is arguably most vulnerable to statistical variability, has been the workhorse of the electronic industry for more than three decades. In this paper, the dependence of the statistical variability of key figures of merit on gate geometry, temperature and body bias in 25nm gate-length MOSFETs, representative for the 20nm CMOS technology generation, are systematically investigated using 3D statistical simulations. The impact of all relevant sources of statistical variability… Show more

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Cited by 29 publications
(10 citation statements)
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“…The methodology used in our analysis is an advancement over the approaches previously reported in literature, in that we simultaneously considered all the relevant sources of statistical variability, as well as their dependence on the most critical geometrical parameters. Previous works considered only Si channel material [12,[14][15][16][17][18][19][20], fewer variability sources and/or sensitivity parameters [17,[19][20][21][22][23][24], and devices not as aggressively scaled as in our investigation [12,15,17].…”
Section: Introductionmentioning
confidence: 99%
“…The methodology used in our analysis is an advancement over the approaches previously reported in literature, in that we simultaneously considered all the relevant sources of statistical variability, as well as their dependence on the most critical geometrical parameters. Previous works considered only Si channel material [12,[14][15][16][17][18][19][20], fewer variability sources and/or sensitivity parameters [17,[19][20][21][22][23][24], and devices not as aggressively scaled as in our investigation [12,15,17].…”
Section: Introductionmentioning
confidence: 99%
“…It features a hafnium--based high--κ gate dielectric and TiN metal gate with equivalent oxide thickness of 0.85 nm. The complex doping profiles of this device were optimized in [6], in terms of both nominal device performance and variability. A retrograde doping profile reduces the effective channel doping near the interface, which in turn reduces the RDD--induced variability.…”
Section: Simulation Methodologymentioning
confidence: 99%
“…However in figures 12 (a) and (b) the proportion of acceptors at the drain--side is high. As drain bias, and hence the drain side electric field, increases, the effect of these drain--side dopants in providing a barrier to current is constrained, and the overall source drain potential barrier is significantly reduced [6]. Thus the transistors in figures 12 (a) and (b) exhibit high DIBL values.…”
Section: B Correlation Between Vt and Diblmentioning
confidence: 99%
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