Germanium content dependence of the leakage current of recessed SiGe source/drain junctions

Simoen, Eddy; González, Mireia Bargalló; Eneman, G.; Verheyen, Peter; Benedetti, Alessandro; Bender, Hugo; Loo, Roger; Claeys, Corneel

doi:10.1007/s10854-006-9102-7

Cited by 22 publications

(25 citation statements)

References 16 publications

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“…The current density of embedded Si 0.7 Ge 0.3 p + n junctions is a function of many process parameters, as already shown elsewhere in more detail (12,40,41). According to Fig.…”

Section: Electrically Active Defects In Embedded Sige and Sic Source/mentioning

confidence: 70%

See 1 more Smart Citation

Electrical Activity of Dislocations and Defects in Strained Si and Ge Based Devices

Simoen¹,

Eneman²,

Verheyen³

et al. 2008

ECS Trans.

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This paper reports on the Solid Phase Epitaxial Regrowth (SPER) of phosphorus implanted pre-amorphized p-type germanium at 350 oC using Rapid Thermal Annealing and focuses more specifically on the P concentration dependence of the regrowth velocity. This is studied by a combination of Rutherford Backscattering in the channeling mode (RBS-C) and Secondary Ion Mass Spectrometry (SIMS). As will be shown, different regimes can be distinguished whereby for chemical concentrations up to 4-5x1020 cm-3 an enhanced recrystallization occurs compared with undoped amorphized Ge. Above this metastable solid solubility limit, the regrowth is retarded, due to the redistribution and snow plow of the excess P across the amorphous/crystalline interface. It will also be demonstrated that during SPER at 350 oC, limited P-diffusion occurs even at the highest implantation dose studied.

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“…The current density of embedded Si 0.7 Ge 0.3 p + n junctions is a function of many process parameters, as already shown elsewhere in more detail (12,40,41). According to Fig.…”

Section: Electrically Active Defects In Embedded Sige and Sic Source/mentioning

confidence: 70%

“…According to Fig. 7, the highest leakage current density is found for the no HDD hetero-junctions (12) and for junctions where part of the strain is relaxed (R) through MDs and TDs (41). This will be discussed in more detail in the following section.…”

Section: Electrically Active Defects In Embedded Sige and Sic Source/mentioning

confidence: 83%

Electrical Activity of Dislocations and Defects in Strained Si and Ge Based Devices

Simoen¹,

Eneman²,

Verheyen³

et al. 2008

ECS Trans.

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“…(8), for temperatures ranging from -40˚C to 145˚C and a reverse voltage up to 1 V. Taking into account the diffusion (J diff ), the SRH and the trap-assistedtunneling contributions, is defined as:…”

Section: (γ Dirac +1)r Srh Curves Association Model and Experiment: Mmentioning

confidence: 99%

Analysis of the Temperature Dependence of Trap-Assisted-Tunneling in Ge pFET Junctions

et al. 2011

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In this work, the temperature behaviour of trap-assisted tunneling in Ge pFET junctions selectively grown in STI substrates is evaluated. The experimental results are compared with the TAT model for Si proposed by Hurkx et al.(1), where several parameters (such as the effective mass and trap level values) are adapted in order to obtain the best agreement between the model and the experimental results.

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“…Additionally, the Si 1-x Ge x layer in the S/D regions reduces the S/D series resistance. In order to improve the electrical performance, one issue which needs to be considered is the strain relaxation (4,5) and the possible presence of electrically active defects at the SiGe/Si interface (6,7).…”

Section: Introductionmentioning

confidence: 99%

Analysis of the Pre-epi Bake Conditions on the Defect Creation in Recessed SiGe S/D Junctions

González¹,

Thomas²,

Simoen³

et al. 2007

ECS Trans.

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This paper reports on the impact of the pre-epi bake conditions on the epitaxial growth of Si1 xGex Source-Drain (S/D) stressors as studied by p-n junction leakage analysis. It has been demonstrated that the presence of impurity-related (O, C) defects located at the epi/substrate interface, can act as nucleation sites for misfit dislocations, which degrade device performance. It has been shown that the area current density decreases exponentially with the pre-epi bake temperature. An empirical approach has been developed to quantify the leakage current enhancement due to the formation of the impurity-related (O, C) defects present at the epi/substrate interface, when the pre-epi bake is insufficient to remove the interface contamination. Moreover, the impact of the waiting time before the loading of the wafer inside the reactor on the defect creation is discussed. Finally, it has been demonstrated experimentally that the study of p-n junction characteristics is a highly sensitive technique for the assessment of the quality of the epitaxial interface, when C and O levels at the epi/substrate interface approach the SIMS detection limits.

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Germanium content dependence of the leakage current of recessed SiGe source/drain junctions

Cited by 22 publications

References 16 publications

Electrical Activity of Dislocations and Defects in Strained Si and Ge Based Devices

Electrical Activity of Dislocations and Defects in Strained Si and Ge Based Devices

Analysis of the Temperature Dependence of Trap-Assisted-Tunneling in Ge pFET Junctions

Analysis of the Pre-epi Bake Conditions on the Defect Creation in Recessed SiGe S/D Junctions

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