Germanium nanoparticles formation in silicon dioxide layer by multi-energy implantation of Ge negative ions and their photo-luminescence

Studies of electrical and optoelectronic properties of Ge-ion-implanted SiO2 thin films

“…In the study by Arai et al [41], the oxidation phenomenon in their multiple-implanted samples by high energies (10 -50 keV) was attributed to the local excess oxygen atoms caused by collision of Ge atoms and recoil of oxygen atoms in the SiO 2 matrix during the implantation. The location of the excess oxygen can be predicted by Stopping and Range of Ions in Matter (SRIM) simulation, and the result indicates that the distribution of oxygen recoil is near the surface along the trajectory of the implanted Ge ions[41]. This mechanism can also explain the oxidation behavior observed in the present study.…”

“…From the previous studies on Cs-and B-ion-implanted SiO 2 , it is known that ion implantation modifies the SiO 2 by creating defects / traps in the bulk of oxide film [46]. For the case of Ge ion implantation, besides the implantation-induced defects, the formation of Ge nanocrystals (nc-Ge) in the SiO 2 matrix has also been observed in many previous studies [41,[43][44][45]. Thus, the current transport of Ge-ion-implanted SiO 2 is different from that of the conventional SiO 2 and demands an in-depth study.…”

“…On the other hand, to produce nc-Ge dispersed in SiO 2 which is occasionally required by some optoelectronic applications [41], a higher implant energy could be used.…”

“…However, the current transport behavior of Ge-ion-implanted SiO 2 thin films has not been studied in detail. Ge-ion-implanted SiO 2 thin films differ from the pure SiO 2 in many aspects: 1) nc-Ge are formed in the SiO 2 matrix [41,[43][44][45], 2) defects / traps are created in the bulk of oxide film in a way similar to those cases of Cs-and B-ionimplanted oxide films [46]. For the applications of non-volatile memory and light-emitting devices, the Ge-ion-implanted SiO 2 embedded with nc-Ge serves as a gate dielectric layer sandwiched by the gate electrode and the Si substrate.…”

“…It should be noted that when E OX is beyond 9 MV/cm, increasing temperature causes a slight increase of the J GATE , and dielectric breakdown occurs for some devices. At such a high electric field, the current transport in a dielectric layer is affected by effects such as impact ionization, trap generation, oxide degradation and dielectric breakdown [40,41]. In the present study, only the current transport behavior for E OX < 9 MV/cm is investigated.…”