Gettering of Copper in Silicon‐on‐Insulator Structures Formed by Oxygen Ion Implantation

Delfino, M.; Jaczynski, M.; Morgan, A. E.; Vorst, C.; Lunnon, M. E.; Maillot, Pauline

doi:10.1149/1.2100812

Cited by 18 publications

(2 citation statements)

References 8 publications

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“…Similar dopant distributions were also observed in gettering experiments. 30,31 In a previous publication, we have proposed a link between vacancy injection and substrate consumption. 10 We believe that since arsenic diffusion is enhanced by the vacancy injection at the interface, arsenic atoms can travel into the TiSi 2 even more effectively and reach the TiSi 2 surface where they occupy a fraction of the adsorption sites which would otherwise be available for SiH 4 molecules.…”

Section: Resultsmentioning

confidence: 99%

Arsenic Redistribution during Rapid Thermal Chemical Vapor Deposition of TiSi[sub 2] on Si

Fang

Öztürk

O’Neil

et al. 2001

J. Electrochem. Soc.

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This paper studies the redistribution behavior of implanted arsenic during selective rapid thermal chemical vapor deposition of titanium disilicide (TiSi 2 ). The arsenic implant doses ranged from 3 ϫ 10 14 cm Ϫ2 to 5 ϫ 10 15 cm Ϫ2 . The TiSi 2 films were deposited either directly on arsenic-implanted silicon substrates or on epitaxial silicon buffer layers selectively deposited with varying thicknesses before TiSi 2 depositions. SiH 4 and TiCl 4 were used as precursors for TiSi 2 depositions and Si 2 H 6 and Cl 2 for selective silicon epitaxial growth. Experimental data revealed that the majority of the implanted arsenic was lost from the silicon substrate into the deposited TiSi 2 films when epitaxial silicon buffer layers were not employed. With the inclusion of the buffer layer, the arsenic loss could be reduced significantly. The loss of arsenic observed could not be explained by considering substrate consumption alone. In both cases, arsenic exhibited strongly enhanced out-diffusion from the silicon substrate into the TiSi 2 film. The injection of vacancies during the TiSi 2 depositions has been proposed as the reason for this enhanced out-diffusion. Monte Carlo simulations have been performed to verify the proposed model. Titanium disilicide (TiSi 2 ) is widely used to form low resistivity contacts to silicon devices. 1 Self-aligned silicide ͑SALICIDE͒ technology is used to form TiSi 2 on source/drain junctions and polysilicon gate electrodes of complementary metal-oxide-silicon ͑CMOS͒ devices. 2 As device dimensions shrink into the deep submicrometer regime, reducing the silicon substrate consumption and achieving the low resistivity C54 phase of TiSi 2 is becoming much more difficult. 3 Selective chemical vapor deposition ͑CVD͒ of TiSi 2 offers an alternative process solution with the potential to alleviate these problems. By introducing titanium and silicon from gaseous sources, TiSi 2 can be formed without substrate consumption. 4,5 Preliminary results have shown that formation of TiSi 2 on fine polysilicon lines can also be improved by CVD. 6 Because TiSi 2 is formed simultaneously on source/drain and polysilicon gate electrodes doped with different impurities, it is important to study the interactions between silicide formation and dopant redistribution in silicon. Extensive research has been carried out on this topic. 7-9 It was found that dopants in Si reduce the silicide growth rate, with arsenic having the strongest impact. Furthermore, during conventional TiSi 2 formation, dopants easily diffuse into the growing silicide without a ''snow plow'' effect. A recent study from this laboratory explored selective CVD of TiSi 2 on heavily arsenicdoped substrates. 10 It was found that arsenic introduces a barrier to TiSi 2 nucleation and results in enhanced substrate consumption. It was also shown that arsenic displays a strong tendency to diffuse into TiSi 2 during deposition. Arsenic loss into TiSi 2 during CVD processing was also observed by Southwell et al. 11 They attributed the effect to the injec...

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Section: Resultsmentioning

confidence: 99%

Arsenic Redistribution during Rapid Thermal Chemical Vapor Deposition of TiSi[sub 2] on Si

Fang

Öztürk

O’Neil

et al. 2001

J. Electrochem. Soc.

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“…It has been demonstrated that Cu can diffuse through the BOX layer of SIMOX at elevated temperature. [5][6][7] However, the BOX layer in BESOI and bonded/ion-cut SOI is much denser than that in SIMOX.…”

Section: Introductionmentioning

confidence: 99%

Gettering of Cu by microcavities in bonded/ion-cut silicon-on-insulator and separation by implantation of oxygen

Zhang

Zeng

Chu

et al. 1999

Journal of Applied Physics

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Microcavities formed by H+ and He+ implantation and subsequent annealing are effective gettering sites for transition metal impurities in silicon. However, gettering in silicon-on-insulator (SOI) materials is quite different from that in silicon. In this work, we investigate the gettering of Cu to these microcavities in silicon, separation by implantation of oxygen (SIMOX) and bonded/ion-cut SOI wafers. Our data indicate that He+ implantation in the high dose regime (0.2–1×1017 cm−2) creates a wide band of microcavities near the projected range without causing blistering on the sample surface. On the other hand, the implantation dose of H+ needed for stable microcavity formation is relatively narrow (3–4×1016 cm−2), and this value is related to the projected range. The different behavior of H and He in silicon is discussed and He implantation is more desirable with regard to impurity gettering. Cu is implanted into the surface region of the Si and SOI samples, followed by annealing at 700 and 1000 °C. Our results indicate that the microcavities can effectively getter a high dose of Cu (2.5×1015 cm−2) at 700 °C in bulk Si wafer, but higher temperature annealing is needed for the effective gettering in SIMOX. Gettering of Cu by the intrinsic defects at or beneath the buried oxide interface of the SIMOX is observed at 700 °C, but no trapped impurities are observed after 1000 °C annealing in the samples in the presence of microcavities. Almost all of the 1×1014 cm−2 Cu implanted into the Si overlayer of the bonded/ion-cut SOI diffuse through the thermally grown oxide layer and are captured by the cavities in the substrate after annealing at 1000 °C.

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Recent Advances of Ion Beam Synthesis for Silicon-on-Insulator Structures

Skorupa¹,

Grötzschel²,

Bartsch

1989

Phys. Stat. Sol. (a)

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A short review on recent advances of ion beam synthesis of buried insulating layers in silicon for the purpose of forming silicon‐on‐insulator (SOI) structures is presented. Aspects of materials research and device processing are discussed. These include low dislocation Soi, silicon oxynitride formation, gettering in Soi‐structures with epitaxial layers, minimization of unwanted doping and the beneficial effect of thin silicon layers (d ≦ 100 nm) on the properties of semiconductor devices with submicron dimensions.

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Gettering of Copper in Silicon‐on‐Insulator Structures Formed by Oxygen Ion Implantation

Cited by 18 publications

References 8 publications

Arsenic Redistribution during Rapid Thermal Chemical Vapor Deposition of TiSi[sub 2] on Si

Arsenic Redistribution during Rapid Thermal Chemical Vapor Deposition of TiSi[sub 2] on Si

Gettering of Cu by microcavities in bonded/ion-cut silicon-on-insulator and separation by implantation of oxygen

Recent Advances of Ion Beam Synthesis for Silicon-on-Insulator Structures

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