The surface defects introduced on silicon surfaces by reactive ion etching are characterized by analyzing the pulseheight dependence of DLTS spectra, in which the transient response of the occupation of carriers in discrete levels is taken into account by using the Fermi-Dirac distribution function in the calculation. The material used as the cathode table is shown to be a source of the contaminants on the reactive ion etched silicon (RIE-Si) surface, and a correlation between the characteristics of electron traps and the cathode material is found. A model of the surface region of RIE-Si substrate is proposed, which includes an interfacial layer on the substrata and a damaged region near the top surface containing carrier traps. The calculated value of about 200A for the thickness of the damaged region shows good agreement with measured thicknesses of about 300~ for the case of RIE using polyimide-coated cathode.Reactive ion etching (RIE) is very useful for fabricating silicon devices and integrated circuits, in which the minimum dimension is 1 ~m or less because of the selectivity and the directionality of RIE.Carbon tetrafluoride (CF4) is most commonly used as the etching gas because it is neither toxic nor reactive in normal, state.However, the surface of the reactive-ion-etched silicon (RIE-Si) is covered with fluorocarbon polymer film (1), grown by the deposited fragments such as ions like CF3 +, CF2 +, CF +, C + , and F +, radicals like F*, and materials sputtered from the inner wall of the chamber, and thought to contain many traps. Furthermore the physical properties of the surface, such as the thickness of the modified surface region and the characteristics of the traps, are still unknown.In consequence, it is necessary to establish a methodology to characterize the electrical properties of the surface of RIE-Si. The deep level transient spectroscopy (DLTS), proposed by Lang (2), has been used in this work as one of the most useful and sensitive methods for this purpose.The spatial distribution of traps in the surface region of the substrata can be obtained by differentiating the net DLTS signal by the thickness of the depletion layer (3). This method, however, cannot be applied if the thickness of the region, in which traps are distributed, is very thin and of the order of 102A, as in the case of RIE-Si, because of the insufficient spatial resolution power of this method.The objective of this l~aper is, therefore, to propose an extension of the DLTS technique to the measuremerit of the electrical properties of the surface defects of silicon subjected to the RIE treatment. Here, in order to avoid disturbance by high tem~oerature processes, Schottky diodes are used for the DLTS analysis.
Model for Surface Region of RIE-SiA modeZ of RIE-Si surface.--It has been reported that the reactive ion etching using CF4 gas is accompanied by simultaneous deposition of a polymer film composed of carbon and fluorine (4). The deposition of the polymer film reduces the etch rate of silicon, but it does not entirely stop ...