Grid generation for three-dimensional process and device simulation

Fleischmann, Peter; Sabelka, R.; Stach, A.; Sträßer, Rudolf; Selberherr, S.

doi:10.1109/sispad.1996.865321

Cited by 8 publications

(4 citation statements)

References 21 publications

(16 reference statements)

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“…Moreover, it accurately estimates structural layers and active dopant distributions at the end of a procedure run. Techniques to enhance process simulation precision and complexity have been investigated in [16], [17].…”

Section: B Previous Workmentioning

confidence: 99%

A fast TCAD-based methodology for Variation analysis of emerging nano-devices

Mohammadi

Gaillardon

Yazdani

et al. 2013

2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)

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Abstract-Variability analysis of nanoscale transistors and circuits is emerging as a necessity at advanced technology nodes. Technology Computer Aided Design (TCAD) tools are powerful ways to get an accurate insight of Process Variations (PV). However, obtaining both fast and accurate device simulations is impractical with current TCAD solvers. In this paper, we propose an automated output prediction method suited for fast PV analysis. Coupled with TCAD simulations, our methodology can substantially reduce the time complexity and cost of variation analysis for emerging technologies. We overcome the simulation obstacles and preserve accuracy, using a neural network based regression to predict the output of individual process simulations. Experiments indicate that, after the training process, the proposed methodology effectively accelerate TCAD-based PV simulations close to compact-model-based simulations. Therefore, the methodology can be an excellent opportunity in enabling extensive statistical simulations such as Monte-Carlo for emerging nano-devices.

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Section: B Previous Workmentioning

confidence: 99%

A fast TCAD-based methodology for Variation analysis of emerging nano-devices

Mohammadi

Gaillardon

Yazdani

et al. 2013

2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)

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“…The global node or edge functions are "active" only in the neighbor elements of the corresponding node or edge, respectively. Applying the Galerkin method to (6) and (7) Z…”

Section: The Problem Descriptionmentioning

confidence: 99%

“…The distributed vector and scalar fields must be extracted in structures which may consist of different inhomogeneous complex shaped three-dimensional regions, like splittings, widenings, and vertical connections. As a consequence, the vector and scalar finite element method (FEM) [4] in the frequency domain on unstructured tetrahedral grid [5,6] needs to be addressed.…”

Section: Introductionmentioning

confidence: 99%

Three-dimensional on-chip inductance and resistance extraction

Nentchev

Selberherr

2007

Proceedings of the 20th Annual Conference on Integrated Circuits and Systems Design

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An efficient three-dimensional finite element frequency domain method to extract the inductance and resistance of small structures like on-chip interconnects or on-chip inductors is presented. Skin effect and proximity effect are taken into account. The parameters are obtained from the field energy calculated from the magnetic field distribution in the simulation domain. The small dimensions of the domain of interest provide the opportunity of using the optimized model of dominant magnetic field even at very high operating frequencies. Vector and scalar shape functions are used for finite element equation system assembling. Series of simulations for an instancing on-chip inductor at frequencies between 1 MHz and 100 GHz are performed to extract the parameters and to visualize the field distributions in the simulation area.

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“…Thereby both steps require a particularly refined grid to achieve appropriate accuracy [3] and, therefore, the vast amount of memory and huge calculation times constitute prohibitive demands in practice.…”

Section: Comparison Of Simulating Approachesmentioning

confidence: 99%

Optimization of Industrial High Voltage Structures by Three-Dimensional Diffusion Simulation

Cervenka

Fleischmann

Selberherr

et al. 2001

31st European Solid-State Device Research Conference

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A major goal in the process development of high voltage processes is the design of devices with given breakdown voltages and low switch on resistances. To reach this goal it is necessary to optimize the space charge regions of the device. Unfortunately these effects are three-dimensional and a device optimization needs the support of accurate three-dimensional simulation, which is shown in this article.

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Grid generation for three-dimensional process and device simulation

Cited by 8 publications

References 21 publications

A fast TCAD-based methodology for Variation analysis of emerging nano-devices

A fast TCAD-based methodology for Variation analysis of emerging nano-devices

Three-dimensional on-chip inductance and resistance extraction

Optimization of Industrial High Voltage Structures by Three-Dimensional Diffusion Simulation

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