2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools 2009
DOI: 10.1109/dsd.2009.190
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GridRT: A Massively Parallel Architecture for Ray-Tracing Using Uniform Grids

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Cited by 8 publications
(5 citation statements)
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“…4 and maps each voxel onto a Processing Element (PE), controlled by a reduced multi-cycle datapath, as described in [18][19][20]. Every PE is now responsible for computing intersection tests within its piece of scene data, in parallel.…”
Section: Hardware Implementationmentioning
confidence: 99%
See 3 more Smart Citations
“…4 and maps each voxel onto a Processing Element (PE), controlled by a reduced multi-cycle datapath, as described in [18][19][20]. Every PE is now responsible for computing intersection tests within its piece of scene data, in parallel.…”
Section: Hardware Implementationmentioning
confidence: 99%
“…The GridRT architecture, described in [18][19][20], is presented in this section, independent of a target platform. Such model can be implemented in a parallel multi-core environment, such as CMPs (Chip Multi-processors) , as well as in FPGAs (Field Programmable Gate Arrays).…”
Section: The Gridrt Architecturementioning
confidence: 99%
See 2 more Smart Citations
“…For example, if in one part of the scene we have only one type of geometric primitives, it would be useful to have multiple hardware cores to perform a parallel computation of the intersections generated in that region. Furthermore, some of the proposed approaches [15] relies on the fact the the input image is composed only of triangles. Even if this is a common solution, it would be useful to support different kinds of intersection primitives in order to obtain a more realistic scene description which will lead in turn to a more realistic rendered image.…”
Section: Related Workmentioning
confidence: 99%