Grounded-gate nMOS transistor behavior under CDM ESD stress conditions

Study of CDM specific effects for a smart power input protection structure

“…In previous results [1][2][3][4][5][6][7], CDM simulation has been used to reconstruct failures in ICs after CDM stress had been applied. The substrate has not been considered for the simulations.…”

“…Most authors put the emphasis on modeling the behavior of ESD protection structures [2][3][4]6], including MOS snapback. Other works focus on simulating the behavior of test circuits and input/output structures during CDM stress [1,5,6] or determination of the behavior of complete ICs [7].…”

“…In the past, various simulation and modeling approaches have been reported for CDM circuit simulation [1][2][3][4][5][6][7]. Most authors put the emphasis on modeling the behavior of ESD protection structures [2][3][4]6], including MOS snapback.…”

Verification of CDM circuit simulation using an ESD evaluation circuit

“…Hence, research in the past has dealt with the ability to determine the behavior of ICs during CDM discharges with circuit simulation. Several studies investigate CDM behavior on device level [1][2][3][4] and for input circuits and test structures [4][5][6][7]. Addressing chip level simulation of CDM discharges, Lee et al [8] suggest that the probability of gate oxide rupture is correlated with the package capacitance of connected circuit parts.…”

Study of turn-on characteristics of SCRs for ESD protection with TDR-O and TDR-S TLPs

“…TLP (Transmission Line Pulsing) testers [5][6], Very-Fast TLP (VF-TLP) [7] and modified VF-TLP [8] testers, and Capacitively-Coupled TLP (CC-TLP) [9] testers are invented as a pulse type curve tracer to measure the current-voltage characteristics of ESD devices. A great number of theoretical analysis and Technology CAD (TCAD) simulation approaches have also been proposed to investigate the transient switching behaviour of protection transistors [10][11], but the simulations need to be carefully calibrated using experimental measurements. Numerous efforts have been made to improve the turn-on efficiency of Silicon Con-trolled Rectifiers (SCR) [12][13][14].…”