2011
DOI: 10.1002/pip.1146
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>16% thin‐film epitaxial silicon solar cells on 70‐cm2 area with 30‐µm active layer, porous silicon back reflector, and Cu‐based top‐contact metallization

Abstract: We demonstrate the use of a copper-based metallization scheme for the specific application of thin-film epitaxial silicon wafer equivalent (EpiWE) solar cells with rear chemical vapor deposition emitter and conventional POCl 3 emitter. Thinfilm epitaxial silicon wafer equivalent cells are consisting of high-quality epitaxial active layer of only 30 µm, beneath which a highly reflective porous silicon multilayer stack is embedded. By combining Cu-plating metallization and narrow finger lines with an epitaxial c… Show more

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Cited by 22 publications
(22 citation statements)
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“…The efficiency of our HJS solar cells was much lower than that of solar cells with kerfless Si as a substrate. 6,7,9,10 To determine why the efficiency of the HJS solar cell was low, we investigated the microstructure and chemically analyzed the exfoliated Si(111) substrate. Figures 4a and 4b respectively show an SEM image and the EDX analysis of the metal-removed side of the exfoliated Si(111) substrate.…”
Section: Resultsmentioning
confidence: 99%
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“…The efficiency of our HJS solar cells was much lower than that of solar cells with kerfless Si as a substrate. 6,7,9,10 To determine why the efficiency of the HJS solar cell was low, we investigated the microstructure and chemically analyzed the exfoliated Si(111) substrate. Figures 4a and 4b respectively show an SEM image and the EDX analysis of the metal-removed side of the exfoliated Si(111) substrate.…”
Section: Resultsmentioning
confidence: 99%
“…6 Petermann et al used a 43-μm-thick and freestanding epitaxial Si film by using the layer transfer technique to obtain a 19% efficient Si solar cell.…”
mentioning
confidence: 99%
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“…Moreover, it was also observed that in some circumstances, the open‐circuit voltage ( V OC ) of epicells with porous silicon is about 20 mV lower than that of epicells without porous silicon. However, this dependence of V OC is not systematic . The second adverse effect of the porous silicon layer is because it presents a large surface area for recombination at the interface between the active layer and the substrate.…”
Section: Introductionmentioning
confidence: 99%
“…Epicells fabricated on mono‐crystalline p + Czochralski (Cz) silicon wafers without any light trapping schemes have resulted in 16.5% efficiency for a 40 µm‐thick epilayer 8. Similarly, epicells with a porous silicon reflector fabricated on p + Cz silicon wafers have resulted in 16.9% efficiency (25 µm‐thick epilayer) on 4 cm 2 area 9 and 16.2% efficiency (30 µm‐thick epilayer) on 70 cm 2 area 10.…”
Section: Introductionmentioning
confidence: 99%