Proceedings of the International Conference on Omni-Layer Intelligent Systems 2019
DOI: 10.1145/3312614.3312636
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Hardware Acceleration of Image Registration Algorithm on FPGA-based Systems on Chip

Abstract: Image processing algorithms are dominating contemporary digital systems due to their importance and adoption by a large number of application domains. Despite their significance, their computational requirements often limit their usage, especially in deeply embedded designs. Heterogeneous computing systems offer a promising solution for this performance gap, leading to their ever increasing utilization by designers. This work targets the acceleration of an image registration pipeline on a System-on-Chip (SoC) … Show more

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Cited by 7 publications
(11 citation statements)
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“…In this configuration, the most employed metrics are cross-correlation, mean square error, and mutual information [1] or its normalized version with nonparametric Parzen windows [14]. As for the optimization [6] Open Full Toolchain SimpleElastix [17] Open Full Toolchain HW GPU [21] Open Full Single Configuration GPU [22] Open Full Single Configuration GPU [24] Open Full Single Configuration GPU [23] Open Full Single Configuration FPGA [7] Closed Full Single Configuration FPGA [19] Closed Full Single Configuration FPGA [27] Closed Full Single Configuration FPGA [10] Open Full Single Configuration Faber (this work) Open Partial Toolchain algorithms, evolutionary strategies [15] and Powell's method [16] are among the most used ones [1]. These components properly combined generate a registration pipeline that can be tailored to various applications.…”
Section: Context Definitionmentioning
confidence: 99%
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“…In this configuration, the most employed metrics are cross-correlation, mean square error, and mutual information [1] or its normalized version with nonparametric Parzen windows [14]. As for the optimization [6] Open Full Toolchain SimpleElastix [17] Open Full Toolchain HW GPU [21] Open Full Single Configuration GPU [22] Open Full Single Configuration GPU [24] Open Full Single Configuration GPU [23] Open Full Single Configuration FPGA [7] Closed Full Single Configuration FPGA [19] Closed Full Single Configuration FPGA [27] Closed Full Single Configuration FPGA [10] Open Full Single Configuration Faber (this work) Open Partial Toolchain algorithms, evolutionary strategies [15] and Powell's method [16] are among the most used ones [1]. These components properly combined generate a registration pipeline that can be tailored to various applications.…”
Section: Context Definitionmentioning
confidence: 99%
“…At the same time, MATLAB proposes fewer algorithms and allows the user to register via GUI or via custom scripts. Concerning the HW-based solutions, different efforts go towards the acceleration of the similarity metric computation and the transformation function, which are the most compute-intensive parts, being the optimizer mainly a lightweight control task [7], [19]. Shams et al present a GPU-based bitonic sort and count approach for accelerating MI [20], which is then used by Ikeda at al.…”
Section: Related Workmentioning
confidence: 99%
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