Proceedings International Conference on Parallel Processing
DOI: 10.1109/icpp.2002.1040854
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Hardware schemes for early register release

Abstract: Register files are becoming one of the critical components of current out-of-order

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Cited by 34 publications
(60 citation statements)
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“…Delayed physical register allocation was also used in [17] to reduce the conflicts over the write ports in a multiple-banked register file. The second set of techniques aim at reducing the register file pressure by using the early deallocation of physical registers [14,15,16,24,41,45]. In [46], a combination of early deallocation and late allocation was used to completely avoid register allocation for a large number of instructions.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…Delayed physical register allocation was also used in [17] to reduce the conflicts over the write ports in a multiple-banked register file. The second set of techniques aim at reducing the register file pressure by using the early deallocation of physical registers [14,15,16,24,41,45]. In [46], a combination of early deallocation and late allocation was used to completely avoid register allocation for a large number of instructions.…”
Section: Related Workmentioning
confidence: 99%
“…Researchers have generally exploited the inefficiencies in register usage to reduce the number of registers by using late register allocation [7,19,33], early deallocation [14,15,16,24] and register sharing [4,11,18]. In this paper, we propose alternative mechanisms for reducing the register file pressure.…”
Section: Introductionmentioning
confidence: 99%
“…This logic is generally arranged in table format to provide predictions for the future [Butts and Sohi 2004] or to accumulate knowledge for use later in the pipeline [Monreal et al 2002]. Supplementing the microarchitecture in this way increases the processor's energy budget, offsetting any performance gains achieved.…”
Section: Introductionmentioning
confidence: 99%
“…Several improvements have been proposed aimed at relaxing the release conditions in order to recycle a physical register identifier quite before the redefining instruction commits [1][2] [3][10] [15] [19] [22]. We can distinguish between safe and speculative policies.…”
Section: Introductionmentioning
confidence: 99%
“…The former takes advantage of the limited compiler knowledge in order to safely release a register read by its only consumer [15]. Any hardware approach monitors program execution so as to safely release a physical register provided that some conditions are met, such as register dependences, conditional branch outcomes or capability to raise exceptions [19] [22].…”
Section: Introductionmentioning
confidence: 99%