Proceedings 2011 International Conference on System Science and Engineering 2011
DOI: 10.1109/icsse.2011.5961879
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Hardware/software co-design of particle filter and its application in object tracking

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Cited by 11 publications
(7 citation statements)
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“…However, few implementations [6] [8] have been using off-chip memory access which is costly. Additionally, most implementations [2][5] [9] are restricted to gray scale image with limited image size.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…However, few implementations [6] [8] have been using off-chip memory access which is costly. Additionally, most implementations [2][5] [9] are restricted to gray scale image with limited image size.…”
Section: Related Workmentioning
confidence: 99%
“…It also focused on memory management schemes for three different applications achieving 4.6 fps to 27 fps. Hardware/software co-design has been proposed in [6], where weight of particles is calculated using software on NIOS-II processor, while particle update is done using hardware circuit. SSRAM/SDRAM is used for storing the image data after reading from CMOS sensor.…”
Section: Related Workmentioning
confidence: 99%
“…It is important to develop a real time working algorithm though it is a challenging task. In recent years real-time working systems [7]- [12] and a number of tracking algorithms [1]- [6] have been developed. Particle filter [2], [6], [8], [13] is a powerful method to localize target, it gives high-precision results in complex situations, where as it is computationally expensive so particle filter is not suitable for real time Implementation and it is highly sensitive to noise too.…”
Section: Introductionmentioning
confidence: 99%
“…(5) is the importance sampling distribution and (6) are the importance weights. The posterior distribution is then approximated by a finite set of particles using the expression in (7).…”
Section: Importance Samplingmentioning
confidence: 99%
“…However, there are not only hardware approaches, but also software/hardware mixed implementations. For instance, in [7] a SoPC (System on Programmable Chip) model with hardware accelerators is proposed, targeting an Altera Cyclone II FPGA. An embedded processor is in charge of computing weight values, whereas the particle update is carried out in hardware, since it is a highly repetitive process.…”
Section: Introductionmentioning
confidence: 99%