Hardware-Software Codesign of Wireless Transceivers on Zynq Heterogeneous Systems

Drozdenko, Benjamin; Zimmermann, Matthew; Dao, Tuan; Chowdhury, Kaushik R.; Leeser, Miriam

doi:10.1109/tetc.2017.2651054

Cited by 35 publications

(29 citation statements)

References 13 publications

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“…Zynq-based SDR. The authors in [166] developed an SDR using the Xilinx Zynq ZC706 and ZedBoard SoCs to implement IEEE 802.11a. For their RF front end, they used Analog Devices FMComm3 AD9361 [69].…”

Section: E Hybrid Designmentioning

confidence: 99%

Software-defined Radios: Architecture, state-of-the-art, and challenges

Akeela

Dezfouli

2018

Computer Communications

114

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Software-defined Radio (SDR) is a programmable transceiver with the capability of operating various wireless communication protocols without the need to change or update the hardware. Progress in the SDR field has led to the escalation of protocol development and a wide spectrum of applications, with more emphasis on programmability, flexibility, portability, and energy efficiency, in cellular, WiFi, and M2M communication. Consequently, SDR has earned a lot of attention and is of great significance to both academia and industry. SDR designers intend to simplify the realization of communication protocols while enabling researchers to experiment with prototypes on deployed networks. This paper is a survey of the state-of-theart SDR platforms in the context of wireless communication protocols. We offer an overview of SDR architecture and its basic components, then discuss the significant design trends and development tools. In addition, we highlight key contrasts between SDR architectures with regards to energy, computing power, and area, based on a set of metrics. We also review existing SDR platforms and present an analytical comparison as a guide to developers. Finally, we recognize a few of the related research topics and summarize potential solutions.

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Section: E Hybrid Designmentioning

confidence: 99%

Software-defined Radios: Architecture, state-of-the-art, and challenges

Akeela

Dezfouli

2018

Computer Communications

114

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“…The key to achieve real-time performance is to determine the best processing components allocation to the hardware and software respectively. A hardwaresoftware codesign for wireless transceiver is investigated based on Zynq based heterogeneous platform [8]. As processing speed of hardware is faster than that of software, software step time is set as the time to process per frame, while that for hardware is set as the time to process per sample (there are multiple processing samples per frame).…”

Section: Key Factors In the Fundamental Time Constraintsmentioning

confidence: 99%

“…In the timing perspective, to achieve the minimum latency is to find the best tradeoff between the step times of hardware and software by determining the best mapping of each component to either processor software or configurable hardware. From the results of IEEE 802.11a implementation in [8], IFFT in the transmitter and preamble detection, FFT and Viterbi decoding in the receiver are more suitable to be implemented by the hardware. The best mapping achieves near minimum latency without too much hardware resource utilization.…”

Section: Key Factors In the Fundamental Time Constraintsmentioning

confidence: 99%

“…A balanced and near-optimal mapping is one that neither the hardware processing time or the software processing time acts as a bottleneck to further decrease the overall processing delay for the chosen processing unit (for example a data frame). This can be done by experimental evaluation of different mappings as in [8], which can achieve the most accurate results but takes effort to disign both implementation of each processing module in both hardware and software. Another way is to determine the processing flow, and estimate the processing complexity for each processing modulel.…”

Section: Hardware-software Codesignmentioning

confidence: 99%

“…Specific techniques are proposed to reduce different latency components, for example, a flexible PHY packet structure based on the IEEE 802.11 OFDM to minimize the transmission time of short packets for WirelessHP [3], and the synchronization accuracy improvement through the implementation modification of IEEE 1588 [7]. The processing delay of transmitter and receiver are investigated in [8], [9]. However, as these solutions are either designed to satisfy given latency requirements or lack complete protocol structure, they all fail to provide an overall latency limit.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Fundamental Constraints for Time-Slotted MAC Design in Wireless High Performance: The Realistic Perspective of Timing

Jiang

Pang²,

Jansson³

et al. 2018

IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society

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Industrial applications pose the most stringent requirements to the underlying communication networks. Wireless industrial communication is gaining popularity due to its costeffectiveness, flexibility and capability of functioning in harsh environments. However, to replace the wired counterpart in the most critical applications performing real-time control and monitoring, the according requirements in terms of latency, reliability and determinism must be met, the latency among which is found to be the bottleneck. To improve the latency performance of wireless communication, modification or new techniques should be developed. Moreover, medium access control (MAC) design should be based on valid timing parameters, as to achieve ultra-low latency, the timing parameters are pushed to the limits. In this paper, we consider to provide fundamental timing constraints as valid inputs for MAC design for wireless high performance network. We start from determining the fundamental constraints as well as the affecting factor in the timing perspective, and then we review and analyze some state-of-art wireless implementations in terms of the timing indexes. Based on the investigation and analysis, realistic timing constraints of different algorithms, hardware, mechanisms are presented, and three main directions for MAC design in wireless high performance network are outlined. Index Terms-industrial wireless communication, critical industrial control application, MAC design, timing constraints Zhibo Pang's work was partly funded by Vinnova (Swedish Innovation Agency) through the grant number 2015-06548 and 2017-02822.

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Chaotic neural network model for SMISs reliability prediction based on interdependent network SMISs reliability prediction by chaotic neural network

Zhu

Zhu-ping

Sun

et al. 2020

Quality & Reliability Eng

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With the development of industrial Internet, smart manufacturing information systems (SMISs) are faced with more uncertainties, dynamics, and complexity. These problems bring more challenges to the reliability operation of SMISs. To solve the above problem, a prediction model based on phase space reconstruction, chaos analysis, and back propagation (BP) neural network is proposed to predict SMISs reliability. First, we decompose failure data series into some subdata series components with strong regularity by using C‐C algorithm and Cao algorithm. On this basis, we use the maximum Lyapunov index to identify chaotic characteristics of failure data series. And then, we establish BP neural network prediction model by using reconstructing failure data to predict SMISs failure behaviors. Finally, we use two groups of failure data series to verify the effectiveness of chaotic BP neural network model, and the experiment results verify that chaotic BP neural network model has more accurate prediction results compared with BP network, support vector machine, long short term memory networks (LSTM), and autoregressive model (AR). LEAD PARAGRAPH SMISs are open and complex systems, human error and external environment cause the uncertainty of reliability. The threat of the external environment mainly comes from malicious attacks and the threat of the human error mainly comes from the wrong operation of the operator. Human error and external environment often cause frequent failures of software and hardware of the system or physical failures of devices. As an open complex system, the reliability operation of SMISs is very important for manufacturing enterprises. However, in the daily use of SMISs, the most common failures are time failure caused by human error and external environment. Therefore, it is very important to study the time failure of SMISs. Main points of this paper: (1) SMISs are complex and open systems, so we establish an interdependent network based on the characteristics of SMISs, and use the cascade effect of the complex network to point out that when SMISs fail, the system will easily fall into failure. (2) The phase space reconstruction method is used to restore the real data characteristics of failure data. (3) By using the reconstructed data and the neural network, the failure behavior can be predicted accurately. Compared with other popular prediction methods, it is found that general machine learning methods cannot predict data with chaotic characteristics. The research results of this paper find that when SMISs fail, the failure behavior can easily lead SMISs into chaos through the propagation of interdependent network. Therefore, when future scholars conduct fault analysis on SMISs, they should consider the chaos of the data, otherwise the systems fault analysis and diagnosis cannot be carried out accurately.

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Hardware-Software Codesign of Wireless Transceivers on Zynq Heterogeneous Systems

Cited by 35 publications

References 13 publications

Software-defined Radios: Architecture, state-of-the-art, and challenges

Software-defined Radios: Architecture, state-of-the-art, and challenges

Fundamental Constraints for Time-Slotted MAC Design in Wireless High Performance: The Realistic Perspective of Timing

Chaotic neural network model for SMISs reliability prediction based on interdependent network SMISs reliability prediction by chaotic neural network

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