Hardware solutions for fuzzy control

Costa, Andrea; Gloria, Alessandro De; Faraboschi, Paolo; Pagni, A.; Rizzotto, Gianguido

doi:10.1109/5.364488

Cited by 83 publications

(37 citation statements)

References 18 publications

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“…Furthermore, some special instructions (with a total of 24 lookups + 16 compares + 16ϒ MAX operations) are required to perform the FIS, which come primarily from the fuzzification of two input variables (8 lookups), fuzzy OR operations (16 compares), fuzzy minimum implication (16 lookups), and aggregation of the output (16ϒ MAX operations). Fortunately, these operations can be done very efficiently in the latest range of DSPs, which provide single cycle multiply and add, table lookups and comparison instructions [26,27]. Thus, the FIC RR-WF estimation has the computational requirement of 3Np(l) + 2N + ϒ + 2 complex multiplications for the lth OFDM block.…”

Section: Computational Complexity Analysismentioning

confidence: 99%

Adaptive low-rank channel estimation for multi-band OFDM ultra-wideband communications

Lee

2011

EURASIP J. Adv. Signal Process.

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In this paper, an adaptive channel estimation scheme based on the reduced-rank (RR) Wiener filtering (WF) technique is proposed for multi-band (MB) orthogonal frequency division multiplexing (OFDM) ultra-wideband (UWB) communication systems in multipath fading channels. This RR-WF-based algorithm employs an adaptive fuzzy-inference-controlled (FIC) filter rank. Additionally, a comparative investigation into various channel estimation schemes is presented as well for MB-OFDM UWB communication systems. As a consequence, the FIC RR-WF channel estimation algorithm is capable of producing the bit-error-rate (BER) performance similar to that of the full-rank WF channel estimator and superior than those of other interpolation-based channel estimation schemes.

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Section: Computational Complexity Analysismentioning

confidence: 99%

Adaptive low-rank channel estimation for multi-band OFDM ultra-wideband communications

Lee

2011

EURASIP J. Adv. Signal Process.

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“…This membership function circuit shares the advantages of Fig. 4(b) regarding control of the centers and widths through voltages applied to high input impedance terminals (7) On the other hand, the slope at the crossover points is controlled by the large signal transconductance of the MOS transistor 5 (8) The main advantage of this membership function circuit is that it does not require any linearization circuitry-why to linearize if the whole behavior is nonlinear? Thus, it features minimum area occupation and power consumption, and full usage of the transconductor input dynamic range.…”

Section: A Membership Function Circuitrymentioning

confidence: 99%

“…The hardware required for these applications can be realized in two alternative ways. One employs analog circuitry only at A/D and D/A conversion interfaces, while the fuzzy processing is realized in digital domain by either general-purpose processors or dedicated ASIC's [5]- [8]. The other realizes the fuzzy processing itself in the analog domain, and employs the digital circuitry for programmability and reconfigurability [9].…”

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confidence: 99%

A modular programmable CMOS analog fuzzy controller chip

Rodríguez-Vázquez

Navas

Delgado‐Restituto

et al. 1999

IEEE Trans. Circuits Syst. II

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Abstract-We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital programmability. This chip consists of the interconnection of parameterized instances of two different kind of blocks, namely label blocks and rule blocks. The architecture realizes a lattice partition of the universe of discourse, which at the hardware level means that the fuzzy labels associated to every input (realized by the label blocks) are shared among the rule blocks. This reduces the area and power consumption and is the key point for chip modularity. The proposed architecture is demonstrated through a 16-rule twoinput CMOS 1-m prototype which features an operation speed of 2.5 Mflips (2.5 2 2 2 10 6 fuzzy inferences per second) with 8.6 mW power consumption. Core area occupation of this prototype is of only 1.6 mm 2 including the digital control and memory circuitry used for programmability. Because of the architecture modularity the number of inputs and rules can be increased with any hardly design effort.

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“…Programmable implementations of fuzzy processing are either additions to existing processors (such as found in the CPU12 from Motorola [12] or in the FLORA processor [13]), or custom fuzzy programmable processors. The FLORA processor extends a RISC instruction set with the min and macc instructions (for the minimum calculation and the multiply-and-accumulate operation, respectively) to improve fuzzy processing.…”

Section: Related Workmentioning

confidence: 99%