Hardware Synthesis of Explicit Model Predictive Controllers

Abstract

Abstract-The general solution to constrained linear and piecewise linear model predictive control (MPC) has recently been explicitly characterized in terms of piecewise linear (PWL) state feedback control. This means that a PWL controller can be precomputed using parametric programming, and the exact explicit MPC implementation amounts to the evaluation of a PWL function in the control unit. It has recently been shown that PWL function evaluation can be accelerated by searching a binary tree data structure, leading to highly efficient, accurate, and verifiable software implementation in low-cost embedded control units. In this work we report hardware synthesis results for this type of PWL control, and show that explicit MPC solutions can be implemented in an application specific integrated circuit (ASIC) with about 20,000 gates, leading to computation times in the microsecond scale. This opens the way for the use of highly advanced control designs such as constrained MPC in small-scale industrial and consumer electronics application areas that are characterized by fast sampling or low cost, including mechatronics, MEMS, automotive control, power electronics, and acoustics. The main limitation of the approach is that the memory requirements increase rapidly with the problem dimensions.

Model predictive control for deeply pipelined field-programmable gate array implementation: algorithms and circuitry

“…An ASIC implementation of explicit MPC [28], based on parametric programming, was described in [29]. The scheme works by dividing the state-space into non-overlapping regions and pre-computing a parametric piecewise linear solution for each region.…”

“…The online implementation is reduced to identifying the region to which x belongs and implementing a simple linear control law. Explicit MPC is naturally less vulnerable to finite precision effects, and can achieve high performance for small problems, with sampling intervals on the order of µseconds being reported in [29]. However, the memory and computational requirements typically grow exponentially with the problem size, making the scheme unattractive for handling large problems.…”

Explicit predictive control with non-convex polyhedral constraints

“…Apart from the computational cost, another fundamental criterion to analyze the algorithm performance is the memory requirement, which is often the critical bottleneck for explicit MPC [6].…”

Implementation of linear model predictive control using a field-programmable gate array

“…One line of research, known as "explicit MPC" has examined how the control solution can be decomposed offline into piecewise affine control laws valid over precomputed affine regions [9,21]. This approach takes advantage of recent advantages in the availability of cheap high density computer memory, capable of storing the potentially large number of affine controllers and state regions [9,24].…”

“…This approach takes advantage of recent advantages in the availability of cheap high density computer memory, capable of storing the potentially large number of affine controllers and state regions [9,24]. Another line of research has examined how advances in processor speed and/or the potential for implementation of custom designed FPGA-based compute platforms may be exploited [4,8,11,12,23,24].…”