Harnessing reverse annealing phenomenon for shallow p-n junction formation

Abstract

Monocrystalline silicon was implanted with 60 keV fluorine and 20 keV boron ions and annealed. Carrier profile, fluorine and boron redistribution, and the parameters of p+-n junctions were investigated. In ion implanted Si two specific regions were observed in which peculiarities in carrier concentration, resistivity, and F atoms redistribution occurred. It was reasoned that the “under-surface” specific region is enriched with vacancy-type defects while the “amorphous/crystalline (a/c) interface” region is enriched with interstitial type defects. After annealing at a temperature corresponding to the reverse annealing phenomenon, boron atoms were activated in the “under-surface” and deactivated in the “a/c interface” region. The possibility of PMOS transistor fabrication with ultrashallow p+-n junction (60 nm) and low leakage current by F++B+ implantation and low temperature (600–700) °C annealing by using this phenomenon was demonstrated.

Formation of Ultra Shallow p+/n Junction in Silicon Using a Combination of Low-Temperature Solid Phase Epitaxy and Non-Melt Double-Pulsed Green Laser Annealing

“…Furthermore, a very high concentration of dopant atoms can be doped in the amorphous region near the surface. [9][10][11][12][13] For the subsequent thermal annealing, laser thermal processing has been used to regrow the amorphous region by melting the thin layer of silicon (Si), and to activate boron within the molten layer during the resolidification process. 14) However, as device is scaling down to the submicron level, this process may affect adjacent device region which then lead to the deteriorative phenomena in patterned surface.…”