HAW: Hardware-Aware Point Selection for Efficient Winograd Convolution

Li, Chaoran; Jiang, Penglong; Zhou, Hui; Wang, Xiaofeng; Zhao, Xiongbo

doi:10.1109/lsp.2023.3258863

Cited by 2 publications

(1 citation statement)

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“…This approach minimizes the resource costs for the WM calculations in DNN with 1D and 2D convolutions. The authors of [55] develop these ideas by proposing an approach to point selection to reduce hardware costs for the implementation of neural network image processing methods. Paper [56] presents a WM-based hardware accelerator with reduced power consumption and hardware costs for object detection using YOLO networks.…”

Section: Convolution Optimization Using the Winograd Methodsmentioning

confidence: 99%

Modern Trends in Improving the Technical Characteristics of Devices and Systems for Digital Image Processing

Nagornov,

Lyakhov,

Bergerman

et al. 2024

IEEE Access

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The technology development greatly increases the amount of digital visual information. Existing devices cannot efficiently process such huge amounts of data. The technical characteristics of digital image processing (DIP) devices and systems are being actively improved to resolve this contradiction in science and technology. The state-of-the-art methodology includes a huge number of very diverse approaches at the mathematical, software, and hardware implementation levels. We have analyzed all modern trends to improve the technical characteristics of DIP devices and systems. The main distinguishing feature of this review is that we are not limited to considering various aspects of neural network image processing, to which the vast majority of both review and research papers on the designated topic are devoted. Review papers on the subject under consideration are analyzed. Various mathematical and arithmetic-logical methods for improving the characteristics of image processing devices are described in detail. Original and significant architectural and structural solutions are analyzed. Promising neural network models of visual data processing are characterized. Hardware platforms for the design and operation of DIP systems that are efficient in terms of resource costs are considered. The most significant improvements achieved through the hardware implementation of models and methods on field-programmable gate arrays and application-specific integrated circuits are noted.INDEX TERMS High-performance computing, low-area design, low-power device, energy-efficient architecture, neural network, hardware accelerator, FPGA, ASIC.

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Section: Convolution Optimization Using the Winograd Methodsmentioning

confidence: 99%