With the development of the supply chain network (SCN) and big data processing, a simple view at above two technologies separately has become unadvisable; this mainly reflected on the growing amount of data in the SCN nodes. Since the data processing is not timely, the potential risks may spread like dominoes to the entire network. There are many small nodes in the SCN, in which it requires data processing equipment that have characteristics of high integration and miniaturization. For the phenomenon that large shape and real-time shortage exists in designing underlying data processing equipment in SCN with the traditional special large computers and general embedded processor, this paper considering the advantage of parallel character of FPGA (field programmable gate array), a new method, which uses FPGA to design embedded device to execute related algorithms in parallel for underling data processing to reduce risks which caused by time-delay in SCN, is proposed. To verify effectiveness of the proposed method, a FPGAbased design method for Kalman filter algorithm and median filter algorithm is proposed. The performance and advantage of the proposed method are analyzed by comparing with traditional methods. The results shown that the proposed method have high real-time and accuracy in complex algorithm execution for SCN underling data processing, which can reduce the potential risk and improve the performance of entire SCN.

No abstract

No abstract

System in Package (SiP) technology satisfies the further increasing demand by integration of different functions into one unit to reduce size and improve functionality. But the disadvantages of SiP are also increased risks in reliability, manufacturability, and difficulty with test access. A complete final test is necessary before its application. This paper presents a functional test scheme for a mircosystem based on 3D-SiP. Test system consists of a test board designed specifically and Cygwin environment of PC in debug support unit (DSU) and JTAG TAP techniques. It allows the complete final system-testing carry out in a fast, flexible, and nondestructive way. And it can improve the testability and reliability of microsystem.

No abstract