2003
DOI: 10.1149/1.1572154
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High-Aspect-Ratio Copper Via Filling Used for Three-Dimensional Chip Stacking

Abstract: Through-chip electrodes with high aspect ratios can offer the shortest interconnection and reduce signal delay. Copper has been selected as that electrode material because of its good compatibility to conventional multilayer interconnection in large-scale integration and back end-of-line processes. In this paper, filling vias with higher aspect ratio, 10 m 2 and 70 m depth, used for through-chip electrodes is reported. Removing overhang at via tops is important to achieve perfect via filling. Upon testing a se… Show more

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Cited by 142 publications
(101 citation statements)
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“…In Fig. 1(a), copper deposition potentials at 10 mA/ * Corresponding author, E-mail: jhlee@hongik.ac.kr 2 were analysed with time. The addition of tetronic 701 increased the copper deposition overpotential.…”
Section: Resultsmentioning
confidence: 99%
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“…In Fig. 1(a), copper deposition potentials at 10 mA/ * Corresponding author, E-mail: jhlee@hongik.ac.kr 2 were analysed with time. The addition of tetronic 701 increased the copper deposition overpotential.…”
Section: Resultsmentioning
confidence: 99%
“…One of the most promising technologies in 3D packaging is through silicon via (TSV). 1,2) It can achieve high density of packaging and minimize signal delay. Low electric resistance is achieved by interconnecting through via holes due to its short wire length.…”
Section: Introductionmentioning
confidence: 99%
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“…9 The addition of leveler, for example Janus Green B (JGB), can significantly enhance the performance of a plating formula because the forced convection acting on the board surface is always stronger than that at the middle of the TH during electroplating. 16,17 It is a very time-consuming work to search or design additives for TH electroplating. Until now, only few additives used for TH electroplating have been reported.…”
Section: Introductionmentioning
confidence: 99%