High Contrast Ratio Based All-Optical OR and NOR Plasmonic Logic Gate Operating at E Band

Mainka,; Sharma, Satinder K.; Zafar, Rukhsar; Mahdieh, Mohammad Hossein; Singh, Ghanshyam; Salim, Mohammad

doi:10.1007/978-981-13-6159-3_35

Cited by 11 publications

(3 citation statements)

References 14 publications

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“…In recent years, many passive and active SPP devices such as switches [6,7], logic gates [5,[8][9][10][11][12][13][14][15][16][17][18], sensors [19,20], nanowires [21][22][23], splitters [24], flters [25,26], couplers [27], resonators [28,29], and multi-and demultiplexers have been designed [30][31][32][33]. In design of plasmonic logic gates, DMD [14,[34][35][36] and metal-dielectric-metal (MDM) plasmonic waveguides are mostly used [37][38][39][40][41][42][43][44]. DMD plasmonic waveguides ofer advantages such as longer propagation length, reduced propagation loss, higher quality factor, improved fgure of merit, ease of fabrication, and lower coupling loss [5].…”

Section: Introductionmentioning

confidence: 99%

Design of Ultrasmall Plasmonic Logic Gates Based on Single Nanoring Dielectric-Metal-Dielectric Waveguide

Sadeq,

Hayati,

Khosravi

2023

International Journal of Optics

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This paper proposes a new configuration of dielectric-metal-dielectric (DMD) waveguides to design optical logic gates. Seven plasmonic logic gates, including NOT, OR, AND, NAND, NOR, XOR, and XNOR, are realized by one nanoring and four DMD plasmonic waveguides. To realize the logic gates, an ultrasmall size of 300 nm × 300 nm device is designed. The performance of the plasmonic logic gates is based on constructive and deconstructive interference between input and control ports. To evaluate the logic state of the output port, the threshold transmission limit is assumed to be 0.35. The transmission ratio, T, contrast ratio, CR, modulation depth, MD, insertion loss, IL, and contrast loss, CL, parameters measure the seven logic gates’ performance. A maximum T of 232% is obtained for AND, OR, and XNOR logic gates. Simulation results show that the dimensional parameters are optimized because of very high MD for all seven logic gates. Maximum values of CR and CL are obtained for the NOT gate. For the AND gate, a minimum IL value is achieved. The studied plasmonic logic gates can be employed in building blocks of all-optical signal-processing nanocircuits and nanophotonics devices. The finite element method (FEM) simulates the structure with COMSOL Multiphysics 5.4 software.

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Section: Introductionmentioning

confidence: 99%

Design of Ultrasmall Plasmonic Logic Gates Based on Single Nanoring Dielectric-Metal-Dielectric Waveguide

Sadeq,

Hayati,

Khosravi

2023

International Journal of Optics

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“…Basically, logic gates are used to accomplish several functions such as switching operations, recognition and pattern matching and also for the encoding and decoding of data [4]. Among these, the AND gate is employed for performing packet header verification and address recognition, the XOR gate is used for the encryption/ decryption of data and parity checking applications [5].…”

Section: Introductionmentioning

confidence: 99%

2D- PhC based all optical AND, OR and EX-OR logic gates with high contrast ratio operating at C band

Geerthana¹,

SYEDAKBAR²,

Sridarshini³

et al. 2022

Laser Phys.

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In this article, photonic crystal (PhC) based all-optical logic gates, namely AND, OR and EX-OR have been explored and their characteristics are reported. Two-dimensional (2D) PhC based logic gates are proposed using a hexagonal lattice with T-shaped structure by incorporating line defects. The total size of the device is 84 µm2 and it operates at a wavelength of 1550 nm (C band). The designed optical logic gates are investigated using 2D finite difference time domain simulators by means of the plane wave expansion method. Parameters, such as response time and contrast ratio of the designed all-optic logic gates, are analyzed. The proposed AND, OR and EX-OR logic gates offer a contrast ratio of 14.48 dB, 14.57 dB and 12.9 dB respectively with, in order, response times of 0.159 ps, 0.168 ps and 0.1672 ps. The designed logic gates work in the third optical window as they are operating at the 1550 nm wavelength. To specify the performance of the proposed logic gates, their field distribution has been determined and is exhibited. The designed logic gates are suitable for use in photonic integrated circuits, all optical computing and optical sensing applications.

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“…In recent years, researchers have examined different plasmonic waveguides including MIM, IMI, and dielectricloaded surface plasmon polaritons (DLSPP) [5]. Compared to insulating waveguides, plasmonic MIM waveguides enable greater con nement and therefore been presented as a potential option for nanoscale optical circuits [6][7][8][9][10]. Logic gates are essential components in all optical circuit design and a numerous optical equipments, like directional coupler (DC), Mach-Zehnder interferometer (MZI), power couplers, and power dividers, are utilized to realise logic gates such as AND, OR, NOT, XOR, and XNOR, along with universal gates such as NAND and NOR [11].…”

Section: Introductionmentioning

confidence: 99%

Enhanced All-optical Y-shaped Plasmonic NAND Gate Model, Analysis, and Simulation for High Speed Computations

Charles

Sreev

Krishna³

et al. 2021

Preprint

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In this digital era, all-optical logic gates (OLGs) proved its effectiveness in execution of high-speed computations. A unique construction for all optical NAND gate based on the notion of power combiner employing metal–insulator–metal (MIM) waveguide in the Y-shape in a minimal imprint of 6.2 µm × 3 µm is presented and the structure is evaluated by finite-difference time-domain (FDTD) technique. The insertion loss (IL) and extinction-ratio (ER) for proposed model are 6 dB and 27.76 dB. The simplified model is used in the construction of complex circuits to achieve greater efficiency, which contributes to the emergence of a new technique for designing plasmonic integrated circuits.

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High Contrast Ratio Based All-Optical OR and NOR Plasmonic Logic Gate Operating at E Band

Cited by 11 publications

References 14 publications

Design of Ultrasmall Plasmonic Logic Gates Based on Single Nanoring Dielectric-Metal-Dielectric Waveguide

Design of Ultrasmall Plasmonic Logic Gates Based on Single Nanoring Dielectric-Metal-Dielectric Waveguide

2D- PhC based all optical AND, OR and EX-OR logic gates with high contrast ratio operating at C band

Enhanced All-optical Y-shaped Plasmonic NAND Gate Model, Analysis, and Simulation for High Speed Computations

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