High Convergence Rates of CMOS Invertible Logic Circuits Based on Many-Body Hamiltonians

Onizawa, Naoya; Hanyu, Takahiro

doi:10.1109/iscas51556.2021.9401278

Cited by 4 publications

(2 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In our view, in the case of electronic implementation with scalable p-bits, trading an increased number of p-bits for simplified interconnect complexity is almost always favorable. That being said, algorithmic advantages and the better representative capabilities of higherorder interactions are actively being explored [51,53].…”

Section: Full-stack View and Organizationmentioning

confidence: 99%

A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

Chowdhury

Grimaldi

Aadit

et al. 2023

IEEE J. Explor. Solid-State Comput. Devices Circuits

View full text Add to dashboard Cite

The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor defined by Moore's Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.

show abstract

Section: Full-stack View and Organizationmentioning

confidence: 99%

A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

Chowdhury

Grimaldi

Aadit

et al. 2023

IEEE J. Explor. Solid-State Comput. Devices Circuits

View full text Add to dashboard Cite

show abstract

“…However, this IF circuit is customized for a specific-size factorization problem and cannot be logically synthesized from fundamental IL gates. The other CMOS-based probabilistic IL circuits [21] have explored the effect of the three-body interactions in a simplified energy landscape which accelerates the convergence rate of invertible adders. Nevertheless, the hardware overhead of this implementation is high due to the requirement for linear feedback shift registers [22] or xorshift random number generators [2] to generate the stochastic bitstreams.…”

Section: Related Workmentioning

confidence: 99%

Many-Body Effects-Based Invertible Logic With a Simple Energy Landscape and High Accuracy

He,

Fang,

Luo

et al. 2023

IEEE J. Explor. Solid-State Comput. Devices Circuits

View full text Add to dashboard Cite

Inspired by many-body effects, we propose a novel design for Boltzmann machine-based invertible logic using probabilistic bits. A CMOS-based XNOR gate is derived to serve as the hardware implementation of many-body interactions and an invertible logic family is built based on this design. Compared to the conventional two-body-based design framework, the many-body-based design enables compact configuration and provides the simplest binarized energy landscape for fundamental invertible logic gates. Furthermore, we demonstrate the composability of the many-body-based invertible logic circuit by merging modular building blocks into large-scale integer factorizers. To optimize the energy landscape of large-scale combinatorial invertible logic circuits, we introduce degeneracy in energy levels which enlarges the probabilities for the lowest states. Circuit simulations of our integer factorizers reveal a significant boost in factorization accuracy. An example of a 2-bit × 2-bit integer factorizer demonstrated an increment of factorization accuracy from 64.99% to 91.44% with a reduction in the number of energy levels from 32 to 9. Similarly, our 6-bit × 6-bit integer factorizer increases the accuracy from 4.430% to 83.65% with the many-body design. Overall, the many-body-based design scheme provides promising results for future invertible logic circuit designs.INDEX TERMS Probabilistic computing, many-body interactions, invertible logic, integer factorizer, probabilistic bit (p-bit).

show abstract

Direct design of ground-state probabilistic logic using many-body interactions for probabilistic computing

He,

Luo,

Fang

et al. 2024

Sci Rep

View full text Add to dashboard Cite

In this work, an innovative design model aimed at enhancing the efficacy of ground-state probabilistic logic with a binary energy landscape (GSPL-BEL) is presented. This model enables the direct conversion of conventional CMOS-based logic circuits into corresponding probabilistic graphical representations based on a given truth table. Compared to the conventional approach of solving the configuration of Ising model-basic probabilistic gates through linear programming, our model directly provides configuration parameters with embedded many-body interactions. For larger-scale probabilistic logic circuits, the GSPL-BEL model can fully utilize the dimensions of many-body interactions, achieving minimal node overhead while ensuring the simplest binary energy landscape and circumventing additional logic synthesis steps. To validate its effectiveness, hardware implementations of probabilistic logic gates were conducted. Probabilistic bits were introduced as Ising cells, and cascaded conventional XNOR gates along with passive resistor networks were precisely designed to realize many-body interactions. HSPICE circuit simulation results demonstrate that the probabilistic logic circuits designed based on this model can successfully operate in free, forward, and reverse modes, exhibiting the simplest binary probability distributions. For a 2-bit × 2-bit integer factorizer involving many-body interactions, compared to the logic synthesis approach, the GSPL-BEL model significantly reduces the number of consumed nodes, the solution space (in the free-run mode), and the number of energy levels from 12, 4096, and 9–8, 256, and 2, respectively. Our findings demonstrate the significant potential of the GSPL-BEL model in optimizing the structure and performance of probabilistic logic circuits, offering a new robust tool for the design and implementation of future probabilistic computing systems.

show abstract

High Convergence Rates of CMOS Invertible Logic Circuits Based on Many-Body Hamiltonians

Cited by 4 publications

References 17 publications

A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

Many-Body Effects-Based Invertible Logic With a Simple Energy Landscape and High Accuracy

Direct design of ground-state probabilistic logic using many-body interactions for probabilistic computing

Contact Info

Product

Resources

About