High current efficiency sense amplifier using body-bias control for ultra-low-voltage SRAM

Abstract

We propose a current latch sense amplifier with a current-reuse technique (CLSA-w/CR). The CLSA-w/CR is capable of high-speed pre-charging with little increase in power dissipation. The CLSA-w/CR controls body bias voltages of pre-charge transistors in a conventional CLSA. Even though a forward body bias control over MOSFETs can achieve high speed operation of the circuit, it induces large substrate leakage current and increases the power dissipation of the circuit. The CLSA-w/CR we propose, however, can achieve high-speed pre charging without increasing power dissipation. We evaluated the performance of the CLSA-w/CR using SPICE with a set of 0.35-/.Lm standard CMOS parameters. The pre-charge time decreased by 86.9% and the power dissipation increased by only 8.6%compared to that of a conventional CLSA. The CLSA-w/CR showed high-speed pre-charging with small power overhead.

Design and Analysis of High Speed Body Bias Control and CLSA Sense Amplifier

“…Due to variety of Sense Amplifiers in semiconductor memories and the impact they have on final specs of memory, the sense amplifiers have become a separate class of circuit. Sub threshold operation of MOSFETs has been attracting much attention as an alternative to conventional lo w-power techniques [1]. The LSIs that operate in the sub threshold region of MOSFETs can achieve ultra-low power d issipation compared to conventional circuit design.…”