High-Current Reliability of Carbon Nanotube Via Interconnects

Sato, Motonobu; Hyakushima, Takashi; Kawabata, Akio; Nozue, Tatsuhiro; Sato, Shintaro; Nihei, Misato; Awano, Yuji

doi:10.1143/jjap.49.105102

Cited by 16 publications

(11 citation statements)

References 40 publications

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“…First all shells are opened by CMP. 7,13,14 Therefore, at each MWCNT shell a contact to the metal can be established, which causes a significant drop in via resistance. Based on the evaluation of TEM images of as grown CNTs on a blanket substrate with the same layer stack, we found the number of shells to be (20 ± 4) per CNT, using the method proposed here.…”

Section: Resultsmentioning

confidence: 99%

“…[1][2][3] Currently research of CNT interconnects focuses on vias. [7][8][9][10][11][12][13][14][15][16][17][18] Main challenges hereby are the compatibility with the Back-end-of-the-line (BEOL) technology requirement, 7 while simultaneously a high CNT quality and a large CNT density is required. 17 Various substrate materials for CNT growth are used by different groups.…”

mentioning

confidence: 99%

“…8 Also CNT growth behavior on unstructured samples was investigated using Ta as substrate material, which is a typical liner material in BEOL. 19,20 Besides this work, the group of Awano, 10,13,18 incorporates a Cu line in conjunction with a BEOL compatible diffusion barriers.…”

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confidence: 99%

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Distinguishing between Individual Contributions to the Via Resistance in Carbon Nanotubes Based Interconnects

Fiedler

Toader

Hermann

et al. 2012

ECS J. Solid State Sci. Technol.

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We report on the design and fabrication of carbon nanotube (CNT) vias based on a hybrid metal/CNT technology. The CNTs were integrated on a 4 inch Si wafer platform using conventional semiconductor processes. Multiwalled carbon nanotubes were grown vertically aligned on a copper based metal line. Via holes were prepared using a single damascene process. By employing a substratebased selective deactivation of the catalyst, CNT growth was restricted to the vias. Following this process scheme, the impact of post-CNT growth procedures, like chemical mechanical planarization and sample annealing, were investigated and electrically evaluated using conductive atomic force microscopy and current-voltage (I-V) characterization. Probing 440 individual structures, the resistance of two series-connected 5 μm vias were determined to be (800 ± 60) after chemical mechanical planarization. By obtaining the I-V characteristics of single CNTs within an individual via, we found that the measured resistance is determined by the contact resistance of the CNT-metal interface. Two mechanisms were found to be relevant here. First partial oxidation of the metal interface during processing, and secondly, stress-induced voiding caused by the high temperatures during the CNT growth process. Changes in the integration scheme to reduce the overall CNT via resistance are proposed. Continuous down-scaling of the interconnect structures in ultralarge-scale-integrated electronic devices causes deterioration of the resistivity and reliability of copper lines. The International Technology Roadmap for Semiconductors (ITRS) proposed several emerging technologies to replace copper in future interconnect schemes.1 Among them, carbon nanotubes (CNT) are very promising due to their extraordinary electrical properties.2,3 Also the thermal properties of CNTs are highly beneficial for interconnect applications. Due to their one dimensional nature the thermal conduction is anisotropic with a longitudinal thermal conductivity, which can be as large as 6000 W/mK. [4][5][6] Furthermore, due to the strong sp 2 hybridized carbon bonds the CNTs exhibit an extraordinary mechanical strength leading to a large current carrying capacity, which can reach values three orders of magnitude higher than copper. [1][2][3] Currently research of CNT interconnects focuses on vias.7-18 Main challenges hereby are the compatibility with the Back-end-of-the-line (BEOL) technology requirement, 7 while simultaneously a high CNT quality and a large CNT density is required. 17 Various substrate materials for CNT growth are used by different groups. In recent reports the diffusion barrier TiN is used as conductive material. 11,12,15 Focussing on the application of CNTs for local interconnects, CNT based vias were prepared using Poly-Si as conductive substrate. 8Also CNT growth behavior on unstructured samples was investigated using Ta as substrate material, which is a typical liner material in BEOL. 19,20 Besides this work, the group of Awano, 10,13,18 incorporates a Cu line in conjunc...

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Section: Resultsmentioning

confidence: 99%

mentioning

confidence: 99%

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Distinguishing between Individual Contributions to the Via Resistance in Carbon Nanotubes Based Interconnects

Fiedler

Toader

Hermann

et al. 2012

ECS J. Solid State Sci. Technol.

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“…The cylindrical wall consists of carbon 6-membered ring, the diameter of cylinder is from several nano-meter to several tens nano-meter. CNT has many notable features such as peculiar electrical properties, great tolerance to high density electric current (Yao et al, 2000;Sato et al, 2010), high thermal conductivity (Berber et al, 2006), high mechanical strength, and high aspect ratio. Therefore CNT is attempted to be used in various fields such as via structures in interconnects (Kreupl et al, 2002;Yokoyama et al, 2007;Dijon et al, 2010), nano-shuttle memory device (Begtrup et al, 2009), and sensor elements (Tung et al, 2007).…”

Section: Introductionmentioning

confidence: 99%

Damage of single-wall carbon nanotube network structure under electric current loading

Sato

Fujisaki

Sasagawa

2016

Mechanical Engineering Journal

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Carbon nanotubes (CNTs) are highly resistant to deformation, and their electrical characteristics are also resistant to degradation at ambient conditions. The damage mechanisms of CNT loaded under high current density are considered to be the oxidation by Joule heating and migration of carbon atoms by high-density electron flows. In this study, the damage characteristics of single-wall CNT (SWCNT) network structures were investigated under accelerated condition with high current loading and heating. The semiconducting and metallic SWCNT network structure specimens of straight shape with 10 μm in width, and 50 μm or 100 μm in length were fabricated by means of photolithographic technique. A testing system applying high current density was constructed and accelerated tests of SWCNT specimens were conducted in the system. The changes of potential drop among the specimen under the constant current loading were recorded until damage occurrence in the SWCNT network structure. The damage characteristics of the specimens were discussed from the changes of microscopic structure and electric resistance under the different accelerated conditions. The disconnection of SWCNT structure was occurred at the cathode and center area of the straight shaped specimen and these were observed in three dimensional laser microscope and SEM images after current loading. There were two mechanisms based on oxidation of Joule heating and electromigration occurred in the SWCNT specimens under high density current loading.

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“…[4][5][6] Lower resistance and higher endurance against electromigration (EM) of NC materials than those of Cu are expected owing to the longer mean-free path and higher current endurance of NC materials. [7][8][9][10][11][12] To achieve low-resistance MLG interconnects, there are several challenges, such as deposition of MLG films with high quality and carrier doping. Carrier doping is necessary because the resistivity of pristine MLG is higher than that of Cu owing to the low concentration of carriers aside from the longer mean-free path of MLG than that of Cu.…”

Section: Introductionmentioning

confidence: 99%

Bromine doping of multilayer graphene for low-resistance interconnects

Ueno

Kosugi

Imazeki

et al. 2014

Jpn. J. Appl. Phys.

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Multilayer graphene (MLG) is expected to be a low-resistance and high-reliability interconnect material replacing copper (Cu) in nanoscale interconnects. To achieve low-resistance interconnect with MLG, carrier doping is necessary since the carrier concentrations in pristine MLGs are low. In this work, the effects of bromine (Br) doping by intercalation on the carrier concentration and sheet resistance of exfoliated highly oriented pyrolytic graphite (HOPG) were investigated by measuring the Fermi level shift using ultraviolet photoelectron spectroscopy (UPS) and the fourterminal method, respectively. The Fermi level was shifted downward up to 0.63 eV, and the sheet resistance was reduced to less than 10% of that of the pristine HOPG by increasing the Br concentration. A similar Fermi level shift was observed for the commercially available CVD-MLG. Br doping is thus promising for low-resistance MLG interconnects from the perspective of carrier doping.

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High-Current Reliability of Carbon Nanotube Via Interconnects

Cited by 16 publications

References 40 publications

Distinguishing between Individual Contributions to the Via Resistance in Carbon Nanotubes Based Interconnects

Distinguishing between Individual Contributions to the Via Resistance in Carbon Nanotubes Based Interconnects

Damage of single-wall carbon nanotube network structure under electric current loading

Bromine doping of multilayer graphene for low-resistance interconnects

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