High-Efficiency Asymmetrical Half-Bridge Converter With a New Coupled Inductor Rectifier (CIR)

Han, Jung-Kyu; Kim, Jong-Woo; Lee, Byoung-Hee; Lai, Jih‐Sheng; Moon, Gun-Woo

doi:10.1109/tpel.2019.2906722

Cited by 21 publications

(7 citation statements)

References 21 publications

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“…During the first stage of operation, shown in Fig. 6(b), the instantaneous currents in the capacitors C1, C2 and CS are given by (10), (11) and 12…”

Section: F Sixth Stage Of Operation (T1 -T2)mentioning

confidence: 99%

“…The asymmetrical half-bridge dc-dc converter, initially presented by P. Imbertson and N. Mohan in [1] and studied in [2][3][4][5][6][7][8][9][10][11][12], presents high gain and high efficiency, soft commutation in the power semiconductors, small number of components. and is one of the most promising topologies in low-to-medium power applications.…”

Section: Introductionmentioning

confidence: 99%

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Asymmetrical ZVS-PWM Switched-Capacitor Based Half-Bridge DC-DC Converter With Switch Peak Voltage of Vin/2

Caus¹

2020

Preprint

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This paper presents a new power converter topology generated by the integration of the asymmetrical ZVS-PWM dcdc converter with a switched-capacitor ladder-type commutation cell. Circuit operation and theoretical analysis with emphasis on the soft-commutation process are included in the paper. The main advantage of the proposed converter with respect to the conventional asymmetrical half-bridge dc-dc converter is the reduction of the voltage stress across the power switches to the half of the input dc bus voltage, enabling the utilization of lower voltage rating components. Experiments conducted on a laboratory prototype with 1.4 kW power-rating, 800 V input voltage, 48 V output voltage and 100 kHz switching frequency are included, to verify the theoretical analysis and the design methodology. The maximum efficiency of the experimental nonoptimized prototype was 93.6%. Index Terms - Asymmetrical dc-dc converter, pulse-widthmodulation, switched-capacitor, zero voltage switching.<div> </div>

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“…During the first stage of operation, shown in Fig. 6(b), the instantaneous currents in the capacitors C1, C2 and CS are given by (10), (11) and 12…”

Section: F Sixth Stage Of Operation (T1 -T2)mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Asymmetrical ZVS-PWM Switched-Capacitor Based Half-Bridge DC-DC Converter With Switch Peak Voltage of Vin/2

Caus¹

2020

Preprint

View full text Add to dashboard Cite

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“…In recent years, many types of research have been performed, and different challenges about the mentioned issues are discussed in previous studies. [8][9][10][11][12][13][14][15][16][17][18][19][20] But the isolated high step-down converters have not been researched satisfactorily. Many different types of isolated topologies could be used for high step-down converters, but the voltage stress on the transformer's primary side elements is high.…”

Section: Introductionmentioning

confidence: 99%

“…In recent years, many types of research have been performed, and different challenges about the mentioned issues are discussed in previous studies 8–20 . But the isolated high step‐down converters have not been researched satisfactorily.…”

Section: Introductionmentioning

confidence: 99%

“…The Forward converter has high reliability, and also it benefits a simple structure, but it suffers the limitation in the maximum duty cycle ratio and transformer reset problem, which are studied and solved in Park et al, 9 Wu and Xing, 10 and Chu et al 11 The half‐bridge converter is another solution to make an isolated converter with a simple design and without the transformer core saturation problem. The half‐bridge dc‐dc converter without soft switching is presented in Li and Shi, 12 and the asymmetrical half‐bridge converter with soft switching capability is proposed in Li et al 13 and Han et al 14 In Li et al, 13 an isolated series asymmetrical half‐bridge converter (SA‐HBC) is proposed to satisfy the high power and high input‐voltage requirements. Also, two half‐bridge modules with series configuration are adopted in the primary side to reduce the switch voltage stress to half of the input voltage.…”

Section: Introductionmentioning

confidence: 99%

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Analysis and implementation of an isolated high step‐down converter with interleaved output for low voltage applications

Sani

Banaei

Hosseini

2022

Circuit Theory & Apps

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This paper proposes a new isolated high step‐down dc‐dc converter with a more extensive output range and high efficiency. The interleaved output and ZVS‐ZCS switching for all semiconductors have made the converter appropriate for high output current applications. An auxiliary inductor is used to achieve the ZVS (zero‐voltage switching) and ZVZCS (zero‐voltage zero‐current switching) condition, which charges and discharges the parallel snubber capacitors of the power switches at different modes of operation. Therefore, the switching losses of semiconductor components are reduced significantly, which results in enhanced efficiency. Moreover, the connection of an auxiliary capacitor in series with the transformer has prevented the probability of DC‐current saturation. The proposed converter could be controlled with duty‐cycle or switching frequency variations. However, the output voltage control with the switching frequency variations gives an extended range of output voltage compared with the other presented converters. Moreover, a coupled inductor is used to relate the output gain with the turn ratios, which causes a more extensive range for output voltage gain. Finally, the theoretical analysis is given and is compared with a 140 W experimental prototype, which converts a higher input voltage 300v to 7.5 V of the output voltage.

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Digital Predictive Current-Mode Control for Asymmetrical Half-Bridge LED Constant-Current Driver

et al. 2022

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In this paper, we propose three advanced digital predictive current-mode control (DPCC) algorithms based on a simplified estimation method of duty cycle lost time for asymmetric half-bridge (AHB) LED constant-current driver. They are the digital predictive peak current mode control(DPPCC) algorithm based on leading-edge modulation, the digital predictive quasi-valley current mode control(DPqVCC) algorithm based on trailing-edge modulation, and the digital predictive quasi-average current mode control(DPqACC) algorithm based on double-edge modulation. Simulation and experimental results demonstrate that the three DPCC algorithms can effectively offset the effect of delay on digital control performance, which confirms the superiority of DPqACC. When the DPqACC is applied, the seriesload-jump transition times are below 4.5 ms, the maximum load adjustment rate is 0.5%/ V, and the output current can be tuned continuously between 0.3 A and 4.5 A with the longest transition time of 1 ms. Moreover, the three DPCC algorithms are capable of compensating for low-frequency ripples due to the rapid regulation speed of the inner loop. With the electrolytic capacitance removed without additional ripple compensation, the maximum peak-to-peak value of the low-frequency secondary ripple is 0.1163 A (2.91%) when the input isV and the output is 4 A. This approach provides an excellent solution for the digital design of low-ripple AC-DC LED constant-current drivers without electrolytic capacitance.INDEX TERMS asymmetric half-bridge; constant-current driver; estimation of duty cycle lost time; predictive quasi-average current mode; digital predictive current-mode control

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High-Efficiency Asymmetrical Half-Bridge Converter With a New Coupled Inductor Rectifier (CIR)

Cited by 21 publications

References 21 publications

Asymmetrical ZVS-PWM Switched-Capacitor Based Half-Bridge DC-DC Converter With Switch Peak Voltage of Vin/2

Asymmetrical ZVS-PWM Switched-Capacitor Based Half-Bridge DC-DC Converter With Switch Peak Voltage of Vin/2

Analysis and implementation of an isolated high step‐down converter with interleaved output for low voltage applications

Digital Predictive Current-Mode Control for Asymmetrical Half-Bridge LED Constant-Current Driver

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