2013
DOI: 10.1016/j.tsf.2012.12.079
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High efficiency CdTe cells using manufacturable window layers and CdTe thickness

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Cited by 32 publications
(18 citation statements)
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“…The AQE response becomes simpler for the absence of CdS. It should be noted that the device only contains a weak junction between SnO 2 and CdTe (Korevaar et al, 2013;Takamoto et al, 1997). Much simpler band diagram is formed from S4, barely yielding an intricate field or barrier in the window layer.…”
Section: Aqe Results For Fto/sno 2 /Cdte/znte: Cu/au Devicesmentioning
confidence: 99%
See 1 more Smart Citation
“…The AQE response becomes simpler for the absence of CdS. It should be noted that the device only contains a weak junction between SnO 2 and CdTe (Korevaar et al, 2013;Takamoto et al, 1997). Much simpler band diagram is formed from S4, barely yielding an intricate field or barrier in the window layer.…”
Section: Aqe Results For Fto/sno 2 /Cdte/znte: Cu/au Devicesmentioning
confidence: 99%
“…The processing details are irrelevant for the purposes of this paper since devices with similar structure exhibit similar AQE effect. CdTe thin film solar cells were deposited on the glass substrates coated with commercial SnO 2 : F (FTO), which were cut into 60 mm  40 mm pieces and carefully cleaned to remove particulates before deposition (Korevaar et al, 2013). SnO 2 as a high resistivity transparent (HRT) layer was deposited by radio frequency (RF) magnetron sputtering on the FTO substrates, and then proceeding a heat treatment at 500°C for 30 min in N 2 -O 2 mixture atmosphere.…”
Section: Device Fabricationsmentioning
confidence: 99%
“…The J SC -V OC curve follows the same diode-equation as the standard dark-IV curve, except that it neglects the effects of series resistance and also reflects the transport properties of the device under illumination [5,6]. exponential function we are able to extract the saturation current density and the ideality factor as a function of temperature [4,5]. Room temperature ideality factors extracted from the J SC -V OC curves were 1.53 and 1.58 for the non-optimized and optimized devices, respectively.…”
Section: Methodsmentioning
confidence: 99%
“…1. Detailed lay-out info, IV-test-configuration, and details regarding device processing are discussed by Korevaar et al [3,4]. Both devices have mask-defined areas of 0.25 cm 2 .…”
Section: Introductionmentioning
confidence: 99%
“…Measuring the electron beam-induced current (EBIC) near the CdS/CdTe junction, they provide a direct evidence that the CdCl 2 annealing can shallow the depletion region by homogenizing the CdS/CdTe interface Major and Durose, 2009) so that the external quantum efficiency (EQE) is increased. Besides, the S-Te inter-diffusion can also diversify EQE by passivating the grain boundaries (Wang et al, 2012;Kranz et al, 2014), consuming CdS window layer (Korevaar et al, 2013) and producing low band gap alloy CdTe y S 1Ày and CdS x Te 1Àx (Wei et al, 2000;Albin et al, 2002). Thus a http://dx.doi.org/10.1016/j.solener.2015.05.035 0038-092X/Ó 2015 Elsevier Ltd. All rights reserved.…”
Section: Introductionmentioning
confidence: 99%