2021
DOI: 10.1039/d0tc05008c
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High-kdielectrics for 4H-silicon carbide: present status and future perspectives

Abstract: Owing to its superior material and electrical properties such as wide bandgap and high breakdown electric field, 4H-silicon carbide (4H-SiC) has shown promise in high power, high temperature, and radiation...

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Cited by 31 publications
(11 citation statements)
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“…[70,72] Therefore, highly improved dielectric properties were achieved using PANI as reinforcement material, increasing the dielectric properties without strong modifications of the electrical conductivity. Hence, the highdielectric properties [73,74] of the printable acrylates reinforced with 3.5 wt% PANI are ideal for the fabrication of sensors and flexible electronic devices.…”
Section: Electrical Propertiesmentioning
confidence: 99%
“…[70,72] Therefore, highly improved dielectric properties were achieved using PANI as reinforcement material, increasing the dielectric properties without strong modifications of the electrical conductivity. Hence, the highdielectric properties [73,74] of the printable acrylates reinforced with 3.5 wt% PANI are ideal for the fabrication of sensors and flexible electronic devices.…”
Section: Electrical Propertiesmentioning
confidence: 99%
“…Rare earth cerium oxide (CeO 2 ) is amongst the front runners to replace SiO 2 owing to its high k value (~26) as well as outstanding characteristics, which include large bandgap (~6 eV), high dielectric breakdown electric field (~25 MV/cm), strong chemical and thermal stability, as well as low lattice misfit with respect to Si (0.35%) 17‐21 . Besides, the use of high k CeO 2 would prevent premature breakdown of the devices as a lower electric field is induced on the passivation layer relative to the Si substrate 22 . Another versatility of CeO 2 phase in transforming from oxidizing (Ce 4+ ) to reducing (Ce 3+ ) state has attracted its employment in catalytic applications but this feature was deemed to result in detrimental effect towards the passivating properties of CeO 2 layer 23 caused by the formation of low k SiO 2 interfacial layer, of which its presence would ultimately reduce the overall k value of the device 24 .…”
Section: Introductionmentioning
confidence: 99%
“…[17][18][19][20][21] Besides, the use of high k CeO 2 would prevent premature breakdown of the devices as a lower electric field is induced on the passivation layer relative to the Si substrate. 22 Another versatility of CeO 2 phase in transforming from oxidizing (Ce 4+ ) to reducing (Ce 3+ ) state has attracted its employment in catalytic applications but this feature was deemed to result in detrimental effect towards the passivating properties of CeO 2 layer 23 caused by the formation of low k SiO 2 interfacial layer, of which its presence would ultimately reduce the overall k value of the device. 24 Although eradicating the formation of interfacial layer would be very challenging, previous studies reported about the enhancement in breakdown voltage and leakage current due to the interfacial layer formation coupled with an acceptable interface quality between CeO 2 passivation layer and Si substrate.…”
Section: Introductionmentioning
confidence: 99%
“…High-k interfacial layers are also known to improve the barrier properties through surface passivation. Investigations on several high-k dielectric oxide layers such as Al 2 O 3 , CeO 2 , La 2 O 3 , HfO 2 , TiO 2 , and Y 2 O 3 deposited on 4H-SiC has been reported [1], [16], [17]. Yttrium oxide (Y 2 O 3 ) among such dielectrics provides wide bandgap (5.5 eV) as well as high k = 15 − 18 [18].…”
mentioning
confidence: 99%