High-k double gate junctionless tunnel FET with a tunable bandgap

Rahi, Shiromani Balmukund; Ghosh, Bahniman

doi:10.1039/c5ra06954h

Cited by 32 publications

(12 citation statements)

References 19 publications

(27 reference statements)

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“…We included a Shockley-Read-Hall (SRH) recombination model due to the presence of high impurity atom concentration in the channel and Fermi-Dirac statistics to calculate the intrinsic carrier concentration. For more accurate current calculations, Schenk's trap-assisted tunneling (TAT), drift-diffusion current transport model, and quantum confinement (QC) models were also included [23,27,28].…”

Section: Simulation Setupmentioning

confidence: 99%

“…In this work, simulations were carried out using Silvaco Atlas [23,25,26]. In the simulations, a nonlocal model was considered for band-to-band tunneling of charge carriers between source and channel.…”

Section: Simulation Setupmentioning

confidence: 99%

“…In this study, the advantages of the junctionless transistor are captured by adopting the junctionless TFET (JLTFET) structure. To improve the ON-current (I ON ) and suppress the OFF-current (I OFF ) as well as the subthreshold slope (SS), a brokenbandgap source/channel AlGaAs/Si semiconductor is used [18][19][20][21][22][23][24][25][26]. The remainder of this paper is arranged as follows:…”

Section: Introductionmentioning

confidence: 99%

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Heterogate junctionless tunnel field-effect transistor: future of low-power devices

2016

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Gate dielectric materials play a key role in device development and study for various applications. We illustrate herein the impact of hetero (high-k/low-k) gate dielectric materials on the ON-current (I ON ) and OFF-current (I OFF ) of the heterogate junctionless tunnel field-effect transistor (FET). The heterogate concept enables a wide range of gate materials for device study. This concept is derived from the well-known continuity of the displacement vector at the interface between low-and high-k gate dielectric materials. Application of high-k gate dielectric material improves the internal electric field in the device, resulting in lower tunneling width with high I ON and low I OFF current. The impact of work function variations and doping on device performance is also comprehensively investigated.

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Section: Simulation Setupmentioning

confidence: 99%

Section: Simulation Setupmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Heterogate junctionless tunnel field-effect transistor: future of low-power devices

2016

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“…But when a increase in the positive gate voltage applied , the bands in the channel region are pushed down and, tunneling barrier will become narrower which will allow tunneling current to flow. While operating device tunneling mechanism also observed in which electrons travel from the valence band to the conduction band by tunneling across a potential barrier [16][17][18]. Mathematically tunneling probability expressed as-…”

Section: IImentioning

confidence: 99%

Effect of Bandgap Variation on DGTFET

Singh¹

2019

IJRASET

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The physics model and electrical characteristics of the silicon and germanium based tunneling double gate field-effect transistor are discussed for low power logic applications using two dimensional device simulation. Ge has a property of high band-to-band tunneling rate as compared to Si, the Ge-DGTFET suffers from uncontrolled off-state leakage current I off rather than its higher on-state current I on . It is also shown increasing I on with a steeper subthreshold swing SS, source doping concentration is increased to reduce the bandgap and this will narrow the tunneling width. Device design and physics model presenting the impact of Electric field, surface potential model, gate work function,Source Doping and gate oxide variation on the performance of Ge-DGTFET and Si-DGTFET are discussed. The simulations have been carried out on Sentauras TCAD tool.

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“…It has provided N + -I-P + for N-JLTFETs similar to doping profile of an N-TFET using two methods. One method is the use of the charge plasma concept, wherein the desired doping profile is created by choosing appropriate workfunctions for the gates called the polarity gate (PG) located at the source region and the control gate (CG) located at the middle with a lower workfunction than PG for being a nearly intrinsic channel [24][25][26][27]. As the same way, p-channel JLTFET has the similar structure [28].…”

Section: Introductionmentioning

confidence: 99%

Representation of heterostructure electrically doped nanoscale tunnel FET with Gaussian-doping profile for high-performance low-power applications

2018

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In this paper, a gallium antimonide junctionless tunnel field-effect transistor based on electrically doped concept (GaSb-EDTFET) is studied and simulated. The performance of the device is analyzed based on the energy band diagram and electric field profile. The on-current, transconductance, and cutoff frequency are enhanced in case of GaSb-EDTFET compared with Si-EDTFET due to the combination of the high tunneling efficiency of the narrow bandgap and the high-electron mobility of GaSb. On the other hand, the Gaussian-doping profile decreases the ambipolar and off current by increasing the tunneling barrier length at the drain/channel interface. Hence, applying Gaussian-doping profile on GaSb-EDTFET makes it a suitable candidate for analog and digital applications. Next, heterostructure channel/source interface EDTFET is studied which uses GaSb for the source and AlGaSb for the drain and channel regions. Then, it has been optimized by numerical simulation in terms of aluminum (Al) composition. The optimal Al composition was founded to be around 10% (x = 0.1). It is shown that the blend of Gaussian-doping profile and the heterostructure channel/source interface with optimal Al composition remarkably reduces ambipolar current amount to a value of 1.3 × 10 −23 A/μm. The improvements in terms of I off , I on , I on /I off rate, subthreshold swing, transconductance, cutoff frequency, and also suppressed ambipolar behavior are illustrated by numerical simulations.

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High-k double gate junctionless tunnel FET with a tunable bandgap

Cited by 32 publications

References 19 publications

Heterogate junctionless tunnel field-effect transistor: future of low-power devices

Heterogate junctionless tunnel field-effect transistor: future of low-power devices

Effect of Bandgap Variation on DGTFET

Representation of heterostructure electrically doped nanoscale tunnel FET with Gaussian-doping profile for high-performance low-power applications

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