The method of surface preparation on n-type GaAs, even with the presence of an amorphous-Si interfacial passivation layer, is shown to be a critical step in the removal of accumulation capacitance frequency dispersion. In situ deposition and analysis techniques were used to study different surface preparations, including NH 4 OH, Si-flux, and atomic hydrogen exposures, as well as Si passivation depositions prior to in situ atomic layer deposition of Al 2 O 3 . As-O bonding was removed and a bond conversion process with Si deposition is observed. The accumulation capacitance frequency dispersion was removed only when a Si interlayer and a specific surface clean were combined. © 2007 American Institute of Physics. ͓DOI: 10.1063/1.2801512͔GaAs has once again attracted attention as an alternative substrate for metal oxide semiconductor ͑MOS͒ technologies. The advantages of GaAs over silicon are well-known, mainly having a higher electron mobility and breakdown voltage as well as a direct band gap suggesting GaAs for a wide range of devices. The elimination of anomalous frequency dispersion of the accumulation capacitance of GaAs MOS devices is a major motivation behind surface and interface treatment studies. Previous reports have attributed this dispersion, viz., the reduction of maximum capacitance with increasing measurement frequency, to a high density of interface states which results in Fermi-level pinning. Recent studies have indicated that the disruption of As-O bonding at the dielectric/GaAs interface results in an unpinned interface. 1 Revisiting earlier works on Si passivation of GaAs surfaces ͑see, for example, Refs. 2 and 3͒, recent reports of Si deposition on GaAs for surface passivation in conjunction with high-k dielectrics ͑for example, Refs. 4 and 5͒, have stimulated this study using in situ deposition and analysis methods. In this letter, in situ analysis techniques are used to correlate differences in electrical characteristics caused by different surface treatments employed on the technologically relevant n-type GaAs surface for use in enhancement mode transistors.The samples used in this work were n-type Si-doped GaAs wafers with a doping concentration of 5 ϫ 10 17 cm −3 . One set of samples was degreased in acetone, methanol, and isopropyl alcohol for 1 min each, followed by a 3 min etch in 29% NH 4 OH, 6 and dried with N 2 , while another set was prepared, in situ with no chemical treatment, using a hydrogen cracker source ͑cell temperature of 1400°C, P H 2 =1 ϫ 10 −6 mbar͒ producing atomic H with a substrate temperature of 430°C for 30 min. 7,8 Silicon of various thicknesses was deposited at room temperature on treated GaAs by e-beam evaporation ͑deposition rate= 18-132 Å / min in a multitechnique deposition/characterization system ͑base pressure= 2 ϫ 10 −11 mbar͒. 9 MOS capacitors were made using such treated surfaces followed by atomic layer deposition ͑ALD͒ of 10 nm of Al 2 O 3 using trimethylaluminum ͑TMA͒ and H 2 O at 300°C in an adjacent chamber and ex situ, rf sputtered TaN as the gat...