High performance FPGA-based scatter/gather DMA interface for PCIe

Kavianipour, Hossein; Böhm, C.

doi:10.1109/nssmic.2012.6551364

Cited by 12 publications

(10 citation statements)

References 3 publications

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“…Fig. 2 depicts an example in which two systems are connected through PCI Express based interconnection network [10].…”

Section: Implementation Of Rdma Transfer On Pci Expressmentioning

confidence: 99%

Feasibility and Performance Analysis of RDMA Transfer through PCI Express

2017

J Inf Process Syst

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The PCI Express is a widely used system bus technology that connects the processor and the peripheral I/O devices. The PCI Express is nowadays regarded as a de facto standard in system area interconnection network. It has good characteristics in terms of high-speed, low power. In addition, PCI Express is becoming popular interconnection network technology as like Gigabit Ethernet, InfiniBand, and Myrinet which are extensively used in high-performance computing. In this paper, we designed and implemented a evaluation platform for interconnect network using PCI Express between two computing nodes. We make use of the non-transparent bridge (NTB) technology of PCI Express in order to isolate between the two subsystems. We constructed a testbed system and evaluated the performance on the testbed.

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“…Fig. 2 depicts an example in which two systems are connected through PCI Express based interconnection network [10].…”

Section: Implementation Of Rdma Transfer On Pci Expressmentioning

confidence: 99%

Feasibility and Performance Analysis of RDMA Transfer through PCI Express

2017

J Inf Process Syst

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“…This specification describes operations for x1, x2, x4, x8, x12, x16, and x32 lane widths. PCIe is often regarded as one of the main interfaces to connect board to PC [7,8]. Because key PCI attributes, such as its usage model, load-store architecture, and software interfaces, are maintained, whereas its parallel bus implementation is replaced by a highly scalable, fully serial interface.…”

Section: High-speed Serial Interconnectsmentioning

confidence: 99%

Implementation of High-Speed Serial Interconnects for Multi-Processor Parallel System

Wang

Zhao

Yang

et al. 2015

Lecture Notes in Electrical Engineering

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Abstract. Multi-processor parallel system is widely used to meet the increasing demand of high-performance computing. However, the data interacting between processors is often a bottleneck as it is hard for parallel buses to address the requirement of transmitting mass data in high speed. Based on differential signal and embedded clock technology, high-speed serial interconnect has been the ideal solution. In this paper, we designed a multi-processor parallel system and implemented the high-speed serial interconnects between processors based on Serial Rapid IO (SRIO), PCI Express (PCIe), and Hyperlink protocols. The test results are given to show the throughput performance of these interconnects.

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“…In the common case that a processor's tile consists of non-contiguous memory addresses [27,55,32,67], a potentially large number of DMA calls is required, which in turn require deep transaction queues in each DMA engine [40]. As an example, to transfer a tile in a 64-core system from a 2048×2048 HTA without architectural support for strided memory access, similar to the STI Cell [62], each processor requires 256 separate DMA transfers.…”

Section: Apimentioning

confidence: 99%

“…VIRAM [45] can also exploit datalevel parallelism at chip level to overcome the wiring costs of massive bank-switching [45,75], but the memory capacities offered by the various Processor-in-Memory approaches have proven to be impractically small for the commercial market. Moreover, variations of DMA engines, such as scatter-gather DMA [40], still perform transfers between only two components, thus creating out of order access streams to memory.…”

Section: Related Workmentioning

confidence: 99%

Collective Memory Transfers for Multi-Core Chips

Williams¹,

Shalf²

2013

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High performance FPGA-based scatter/gather DMA interface for PCIe

Cited by 12 publications

References 3 publications

Feasibility and Performance Analysis of RDMA Transfer through PCI Express

Feasibility and Performance Analysis of RDMA Transfer through PCI Express

Implementation of High-Speed Serial Interconnects for Multi-Processor Parallel System

Collective Memory Transfers for Multi-Core Chips

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