High-Performance Solenoidal RF Transformers on High-Resistivity Silicon Substrates for 3D Integrated Circuits

Feng, Zhiping; Lueck, Matthew; Temple, Dorota; Steer, M.B.

doi:10.1109/tmtt.2012.2195026

Cited by 23 publications

(13 citation statements)

References 16 publications

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“…Among all the applications of CNTs, applying CNTs into NEMS switches for radio frequency (RF) field is a hot topic [16]. Due to the conducting property and parasitic capacitance of common Si, which may lead to large signal losses and leakage especially in RF region [17], high resistivity Si (HR Si) was chosen to improve the system performance [18].…”

Section: Resultsmentioning

confidence: 99%

Effect of substrates and underlayer on CNT synthesis by plasma enhanced CVD

Jiang

et al. 2013

Adv. Manuf.

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Due to their unique thermal, electronic and mechanical properties, carbon nanotubes (CNTs) have aroused various attentions of many researchers. Among all the techniques to fabricate CNTs, plasma enhanced chemical vapor deposition (PECVD) has been extensively developed as one growth technique to produce vertically-aligned carbon nanotubes (VACNTs). Though CNTs show a trend to be integrated into nanoelectromechanical system (NEMS), CNT growth still remains a mysterious technology. This paper attempts to reveal the effects of substrates and underlayers to CNT synthesis. We tried five different substrates by substituting intrinsic Si with high resistivity ones and by increasing the thickness of SiO 2 insulativity layer. And also, we demonstrated an innovative way of adjusting CNT density by changing the thickness of Cu underlayer.

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Section: Resultsmentioning

confidence: 99%

Effect of substrates and underlayer on CNT synthesis by plasma enhanced CVD

Jiang

et al. 2013

Adv. Manuf.

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“…Si-embedded inductors are also an attractive solution for the advanced packaging of ultra-compact power supplies with the passive interposer 24 . There are prior-art studies of etched Si cavities for embedded inductors (wet-etched 25 and dry-etched 26 ) or through-silicon vias (TSV) 24,[26][27][28] . Yu et al 26 reported a Si-embedded inductor using a fabrication process using 3D shadow masks and multiple lithographical exposures with SU-8.…”

Section: Introductionmentioning

confidence: 99%

“…The interconnections are not through wafer. By contrast, TSV inductors 27 have the advantage of integrated circuit (IC) integration, that is, co-packaged or stacked systems in a package 29,30 . MEMS TSVs are known to be a promising technology for miniaturized RF MEMS and advanced system packaging and integration 31,32 .…”

Section: Introductionmentioning

confidence: 99%

Fabrication of 3D air-core MEMS inductors for very-high-frequency power conversions

Thanh

Mizushima²,

Nour

et al. 2018

Microsyst Nanoeng

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We report a fabrication technology for 3D air-core inductors for small footprint and very-high-frequency power conversions. Our process is scalable and highly generic for fabricating inductors with a wide range of geometries and core shapes. We demonstrate spiral, solenoid, and toroidal inductors, a toroidal transformer and inductor with advanced geometries that cannot be produced by wire winding technology. The inductors are embedded in a silicon substrate and consist of through-silicon vias and suspended windings. The inductors fabricated with 20 and 25 turns and 280-350 μm heights on 4-16 mm 2 footprints have an inductance from 34.2 to 44.6 nH and a quality factor from 10 to 13 at frequencies ranging from 30 to 72 MHz. The air-core inductors show threefold lower parasitic capacitance and up to a 140% higher-quality factor and a 230% higher-operation frequency than silicon-core inductors. A 33 MHz boost converter mounted with an air-core toroidal inductor achieves an efficiency of 68.2%, which is better than converters mounted with a Si-core inductor (64.1%). Our inductors show good thermal cycling stability, and they are mechanically stable after vibration and 2-m-drop tests.

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“…To alleviate the problem, there have been efforts in the literature to make use of these dummy TSVs for alternative purposes [Bontzios et al 2011;VanAckern 2011;Zhang et al 2010;Huang and Chang 2007;Feng et al 2012;Salah et al 2012]. For example, Bontzios et al [2011] and Tida et al [2013] tried to utilize TSVs to implement vertical inductors in toroidal and vertical planar structures for RF applications.…”

Section: Introductionmentioning

confidence: 99%

Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICs

Tida

Zhuo

Shi

2014

J. Emerg. Technol. Comput. Syst.

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There has been a tremendous research effort in recent years to move DC-DC converters on chip for enhanced performance. However, a major limiting factor to implementing on-chip inductive DC-DC converters is the large area overhead induced by spiral inductors. Thus, we propose using through-silicon-vias (TSVs), a critical enabling technique in three-dimensional (3D) integrated systems, to implement on-chip inductors for DC-DC converters. While existing literature show that TSV inductors are inferior compared with conventional spiral inductors due to substrate loss for RF applications, in this article, we demonstrate that it is not the case for DC-DC converters, which operate at relatively low frequencies. Experimental results show that by replacing conventional spiral inductors with TSV inductors, with almost the same efficiency and output voltage, up to 4.3× and 3.2× inductor area reduction can be achieved for the single-phase buck converter and the interleaved buck converter with magnetic coupling, respectively.

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High-Performance Solenoidal RF Transformers on High-Resistivity Silicon Substrates for 3D Integrated Circuits

Cited by 23 publications

References 16 publications

Effect of substrates and underlayer on CNT synthesis by plasma enhanced CVD

Effect of substrates and underlayer on CNT synthesis by plasma enhanced CVD

Fabrication of 3D air-core MEMS inductors for very-high-frequency power conversions

Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICs

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