In this work, we analyze the scavenging effect of titanium gates on metal-insulatorsemiconductor capacitors composed of gadolinium oxide as dielectric material deposited on Si and InP substrates. The Gd 2 O 3 film was grown by high pressure sputtering from a metallic target followed by an in situ plasma oxidation. The thickness of the Ti film was varied between 2.5 and 17 nm and was capped with a Pt layer. For the devices grown on Si, a layer of 5 nm of Ti decreases the capacitance equivalent thickness from 2.3 to 1.9 nm without compromising the leakage current (10 −4 A cm −2 at V gate = 1 V). Thinner Ti has little impact on device performance, while 17 nm of Ti produces excessive scavenging. For InP capacitors, the scavenging effect is also observed with a decrease in the capacitance equivalent thickness from 2.5 to 1.9 nm (or an increase in the accumulation capacitance after the annealing from ∼1.4 to ∼1.7-1.8 μF cm −2 ). The leakage current density remains under 10 −2 A cm −2 at V gate = 1.5 V. For these devices, a severe flatband voltage shift with frequency is observed. This can be explained by a very high interface trap state density (in the order of 10 13 -10 14 eV −1 cm −2 ).