High Quality Tests for Switch-Level Circuits Using Current and Logic Test Generation Algorithms

Abstract

This paper presents an approach to developing high quality tests for switch-level circuits using both current. and logic test generation algorithms. Clear definitions for analyzing the effectiveness of the joint !,est generation approach are derived. Results on a set of switch-level circuits show very high coverage of stuickat, st,uck-on, and stuck-open faults when both current and logic tests are used.