High-Resolution Waveform Capture Device on a Cyclone-V FPGA

Abstract

We introduce the waveform capture device (WCD), a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD is implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA, Intel/Altera Cyclone V), and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It is calibrated via a novel dynamic phase-shifting (DPS) method that requires substantially less data and resources than the state-of-the-art. Using DPS, we find the measurement resolution -or mean propagation delay from one CC element to the next -to be 4.91±0.04 ps (4.54±0.02 ps) for a pulse of logic high (low). Similarly, we find the single-shot precision -or mean error on the timing of the waveform -to be 29.52 ps (27.14 ps) for pulses of logic high (low). We verify these findings by reproducing commercial oscilloscope measurements of asynchronous ring-oscillators on FPGAs, finding the mean pulse width to be 0.240 ± 0.002 ns per inverter gate. Finally, we present a careful analysis of design constraints, introduce a novel error correction algorithm, and sketch a simple extension to the analog domain. We also provide the Verilog code instantiating our design's hardware primitives in an Appendix, and make our FPGA interfacing methods available as an open-source Python library at https://github.com/Noeloikeau/fpyga.

Mathematical Model of Strong Physically Unclonable Functions Based on Hybrid Boolean Networks

“…All of these factors contribute to the kinks in the experimental curves largely absent in the model. An understanding of these instance-level temporal correlations requires ps-scale intra-FPGA measurement tools such as a waveform capture device [11]. Measuring individual ∆ nm , τ n and calibrating the model is the subject of future work.…”

“…In conjunction with the exponential entropy scaling, our results suggest that the HBN-PUF is a true 'strong' PUF. The introduced simulation library supports arbitrary network topologies and logical functions, and in the future we will combine it with 5-ps-resolution experimental measurements using a waveform capture device on the Cyclone V [11]. These measurements will be used to test the predicted sub-ps uncertainty bound required for a modeling attack.…”

“…Here, τ = (1/N ) n τ n is the mean node time constant. We express all future parameters in units of τ = 0.25 ns, a value typical of Cyclone V FPGA logic elements [11].…”