High Speed Average Power CMOS Current Comparator

Abstract

This work proposes the new CMOS Current Comparator circuit suitable for High Speed and Marginal Power applications. Proposed circuit had been simulated in a proprietary 180 nm CMOS process, using Cadence Spectre Simulator and UMC models. Current comparator circuit had impressed with current pulses ranging from Milli-Amperes to Nano-Amperes and its Speed and Power consumption had been simulated and measured. When made a comparison with the earlier reported circuits, our circuit achieves Very High Speed of operation and acceptable power consumption. For Micron range input currents the power consumption of the newly proposed current comparator is very much lower than the other earlier proposed circuits.

Design of Low Leakage Current Average Power CMOS Current Comparator Using SVL Technique

“…In this current comparator circuit uses high output impedance of current mirror for amplifying the differences of input current for large variation in output voltage. Then simulating the result, transient response and DC response of the circuit performed [7] if input current given ±10pA.…”

“…The first CMOS continuous time current comparator was proposed in [6], which consists of two cascade current mirror. The drawback of this design was in terms of high speed and frequency operations [7]. A new design has been proposed [8] which uses inverter stage in feedback with source-follower stage.…”