High-Speed Digital Systems by Hybridization of CMOS and Single-Flux-Quantum Logic Circuits

Yoshikawa, Nobuyuki; Tomida, T.; Tokuda, Masamitsu; Liu, Q.; Whiteley, S.R.; Duzer, T. Van

doi:10.7567/ssdm.2004.i-1-5

Cited by 1 publication

(2 citation statements)

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“…In the previous study, we have developed a 4.2 K CMOS device model and reported nearinfinite retention time of the memory cell at low temperatures [3]. We have also demonstrated the complete operation of the hybrid memory system by low-speed tests [4].…”

Section: Introductionmentioning

confidence: 92%

“…The SFQ-CMOS interface consists of a Josephson latching driver, which is a parallel connection of double 15-junction stacks [5], and CMOS differential amplifiers. The latching drivers amplify submillivolt-level SFQ pulses to 40 mV-level signals, which are further amplified by CMOS differential amplifiers to volt-level signals [3]. In addition to the CMOS differential amplifier, we have a more complex option, a Josephson-CMOS hybrid amplifier [4], which is faster and dissipates less power than the CMOS differential amplifier.…”

Section: Introductionmentioning

confidence: 99%

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Access time measurements of Josephson–CMOS hybrid memory using single-flux-quantum circuits

Yoshikawa¹,

Tokuda²,

Tomida³

et al. 2006

Supercond. Sci. Technol.

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We have measured access time of a 16-kbit Josephson-CMOS hybrid memory by using an SFQ delay measurement system. The delay measurement system is composed of a Josephson latching driver to generate input signals for the memory, an SFQ clock generator and counter to measure the time interval, and a current sense circuit to detect the current output from the memory. The time resolution of the system corresponds to a clock period of the clock generator, which is 50 ps in our design. In these preliminary measurements, we have observed a memory access time of about 4 ns, where the parasitic capacitance of the bonding pad of the Josephson chip limits the access time at present. This is the first demonstration of the access time measurement of a complete Josephson-CMOS hybrid memory.

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Section: Introductionmentioning

confidence: 92%