2008
DOI: 10.4218/etrij.08.0108.0194
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High-Speed Hardware Architectures for ARIA with Composite Field Arithmetic and Area-Throughput Trade-Offs

Abstract: This paper presents two types of high‐speed hardware architectures for the block cipher ARIA. First, the loop architectures for feedback modes are presented. Area‐throughput trade‐offs are evaluated depending on the S‐box implementation by using look‐up tables or combinational logic which involves composite field arithmetic. The sub‐pipelined architectures for non‐feedback modes are also described. With loop unrolling, inner and outer round pipelining techniques, and S‐box implementation using composite field … Show more

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Cited by 4 publications
(5 citation statements)
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“…When we compare our 128-bit masked ARIA module to non-masked ARIA [6], the proposed masking module has low throughput. However, the proposed architectures of 32-bit and 16-bit are more efficient within throughput as shown in Table 6.…”
Section: Implementation Results and Performance Evaluationmentioning
confidence: 99%
See 2 more Smart Citations
“…When we compare our 128-bit masked ARIA module to non-masked ARIA [6], the proposed masking module has low throughput. However, the proposed architectures of 32-bit and 16-bit are more efficient within throughput as shown in Table 6.…”
Section: Implementation Results and Performance Evaluationmentioning
confidence: 99%
“…Thus, S-boxes in the ARIA can be described as where x -1 is the inversion function over GF (2 8 ), and A, B, D, and D -1 are 8×8 binary matrices for affine transform. The matrix A and D are defined in [6]. The diffusion layer of ARIA is originally represented by a multiplication of the 16×16 involution matrix C with a 16×1 input vector I=(I 0 , I 1 , …, I 15 ) T ; therefore, the diffusion output can be denoted as O = C·I [7].…”
Section: Previous Work 1 Block Cipher Ariamentioning
confidence: 99%
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“…In order to ensure specialized security in cryptography environment, [8] suggested the work of a intermediate approach to introduce a trusted third party. A trust-overlay network [9] provides multiple data units for performing a reputation coding of trust between service providers and data source. An article describing the features of security coding is outlined in [10,11].…”
Section: Introductionmentioning
confidence: 99%
“…The combinational design of the proposed Information 2018, 9, 13 2 of 14 lightweight S-box offers hardware advantages-namely compactness in terms of a smaller number of gates-enables sub-pipelining to improve performance optimization and also enables masking mechanisms to counteract side channel attacks [11]. Hardware implementations of the symmetric cryptographic algorithms have been widely explored in the literature [12][13][14][15][16][17]. However, they report the bare minimal focus on the architectural design of the different symmetric lightweight security ciphers.…”
Section: Introductionmentioning
confidence: 99%