High temperature behavior of multi-region direct current current–voltage spectroscopy and relationship with shallow-trench-isolation-based high-voltage laterally diffused metal–oxide–semiconductor field-effect-transistors reliability

Abstract

With the process compatibility with the mainstream standard complementary metal–oxide–semiconductor (CMOS), shallow trench isolation (STI) based laterally diffused metal–oxide–semiconductor (LDMOS) devices have become popular for its better tradeoff between breakdown voltage and performance, especially for smart power applications. A multi-region direct current current–voltage (MR-DCIV) technique with spectroscopic features was demonstrated to map the interface state generation in the channel, accumulation and STI drift regions. High temperature behavior of MR-DCIV spectroscopy was analyzed and a physical model was verified. Degradation of STI-based LDMOS transistors under high temperature reverse bias (HTRB) stress is experimentally studied by MR-DCIV spectroscopy. The impact of interface state location on device electrical characteristics was investigated. Our results show that the major contribution to HTRB degradation, in term of the on-resistance degradation, was attributed to interface state generation under STI drift region.