High-temperature superconducting Josephson fluxon–antifluxon transistors

Abstract

We have realized the Josephson fluxon–antifluxon transistor (JFAT) in high temperature superconductivity using an asymmetric control line on top of either bicrystal junctions or Co-doped YBa2Cu3Ox superconductor–normal–superconductor (SNS) junctions. We have measured current gains as high as 6 for 30 μm-wide bicrystal JFATs (30 K) and as high as 3 for Co-doped SNS JFATs (50 K). An improvement in gain over the Josephson vortex flow transistor, due to improved coupling efficiency, is demonstrated. There is also a reduction of control line inductance that should lead to an improvement in gate speed.

Parallel array of YBa2Cu3O7−δ superconducting Josephson vortex-flow transistors with high current gains

“…1,2 There are two types of JVFTs: ones that are based on a single long Josephson junction (JJ) 3,4 or JVFTs based on arrays of JJs. [5][6][7] A high performance JVFT for practical applications should have a high current gain, g ¼ @I c /@I ctrl (where I c is the device critical current and I ctrl is the control-gate current), a large dynamic range (the range of I ctrl over which a high g can be achieved), small vortex transit times to allow high frequency operation and a relatively large transresistance, r m ¼ @V/@I ctrl .…”

“…[5][6][7] A high performance JVFT for practical applications should have a high current gain, g ¼ @I c /@I ctrl (where I c is the device critical current and I ctrl is the control-gate current), a large dynamic range (the range of I ctrl over which a high g can be achieved), small vortex transit times to allow high frequency operation and a relatively large transresistance, r m ¼ @V/@I ctrl . Several JVFT designs have been proposed so far which differ in (i) current bias distribution (symmetric overlap 1,3 or asymmetric inline 5-7 ), or (ii) gate line geometry (different gate design 4 or different gate line relative orientation with respect to the junctions 6 ). It has been shown 1,3 that discrete JVTFs with an asymmetric current bias distribution have much larger current gains than discrete JVFTs with a symmetric one.…”

Comparison of Josephson vortex flow transistors with different gate line configurations

“…In this design the current gain can be drastically improved by introducing an asymmetric junction geometry [1,2]. Alternatively, instead of altering the bias current distribution, the gate line can be oriented perpendicularly to the junctions in the Josephson fluxonantifluxon transistor (JFAT), shown in Fig.1(b) [3,4]. The JFAT seems to show improved gain as compared to the symmetric JFT [3].…”

“…Alternatively, instead of altering the bias current distribution, the gate line can be oriented perpendicularly to the junctions in the Josephson fluxonantifluxon transistor (JFAT), shown in Fig.1(b) [3,4]. The JFAT seems to show improved gain as compared to the symmetric JFT [3]. In this letter we present a comparative study of both designs by numerical simulation and by experiment, which is intended to clarify their different behavior and which has not been understood so far.…”

“…1(b) [3,4]. The JFAT seems to show improved gain as compared to the symmetric JFT [3]. In this letter we present a comparative study of both designs by numerical simulation and by experiment, which is intended to clarify their different behavior and which has not been understood so far.…”