High Threshold Voltage Enhancement-Mode Regrown p-GaN Gate HEMTs With a Robust Forward Time-Dependent Gate Breakdown Stability

Tang, Shun-Wei; Huang, Zhen-Hong; Chen, Szu-Chia; Lin, Wei-Syuan; Jaeger, B. De; Wellekens, D.; Borga, M.; Bakeroot, Benoit; Decoutere, Stefaan; Wu, Tian-Li

doi:10.1109/led.2022.3198876

Cited by 17 publications

(3 citation statements)

References 13 publications

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“…The primary mechanism for the time-dependent degradation of the p-GaN gate HEMT has been reported to be the formation of a percolation path in the passivation dielectric near the p-GaN sidewall [19][20][21][22]. In this study, the device was deliberately designed to have large gate metal retraction structure in both the vertical and lateral directions, aiming to enhance the lifetime of the device by reducing the sidewall leakage current.…”

Section: Resultsmentioning

confidence: 99%

Stable High Temperature Operation of p-GaN Gate HEMT With Etch-Stop Layer

Lee,

Ryu,

Kang

et al. 2024

IEEE Electron Device Lett.

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High-temperature operation of the p-GaN gate high-electron-mobility transistor (HEMT) was investigated, specifically up to 500 °C. The p-GaN gate HEMT demonstrated stable behavior with normally-off operation, steep increase of drain current in the subthreshold region, and suppressed off-state current. By adding Al2O3 etch-stop layer, the device showed significant reduction in subthreshold swing when measured at 500 °C, effectively mitigating hysteresis in the transfer characteristics. Additionally, the lifetime of the gate stack with the etch-stop layer was estimated to be much longer than that of the stack without the etch-stop layer. Through the integration of the depletion-mode (D-mode) metalinsulator-semiconductor HEMT (MIS-HEMT) device with the p-GaN gate device, a direct-coupled field-effect transistor logic (DCFL) inverter was fabricated. This inverter showed stable logic operation up to 500 °C, featuring rail-to-rail operation and large gain. A long-term reliability test conducted at 500 °C for 100 hours revealed stabilized onstate and off-state values after about 50 hours of operation.

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Section: Resultsmentioning

confidence: 99%

Stable High Temperature Operation of p-GaN Gate HEMT With Etch-Stop Layer

Lee,

Ryu,

Kang

et al. 2024

IEEE Electron Device Lett.

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“…Compared with the GIT, the p-GaN gate with a Schottky-type contact is reverse-biased during the on-state operation. This effectively reduces gate leakage and increases gate swing [15][16][17][18]. However, owing to the relatively low gate breakdown voltage (BV G ) of Schottky gate (10 V-12 V), the maximum gate voltage for the operation of p-GaN Schottky gate HEMTs should not exceed 7 V [19].…”

Section: Introductionmentioning

confidence: 99%

Design optimization of wide-gate swing E-mode GaN HEMTs with junction barrier Schottky gate

Tian,

Zhao,

et al. 2024

J. Phys. D: Appl. Phys.

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To increase the gate swing, a GaN-based high-electron-mobility transistor with a junction barrier Schottky gate (JBS-HEMT) was proposed. Compared to conventional p-GaN Schottky gate HEMTs (Conv-HEMT), the high electric field at the surface is transferred to the pn junction inside the body, and the extended depletion region of the pn junction shields the surface Schottky contact interface for the JBS-HEMT. After fitting the model to the reported device, the proposed JBS-HEMT was simulated and optimized using the Sentaurus TCAD tool. The simulation results of the optimized JBS-HEMT demonstrate a high gate breakdown voltage (17.6V), which is 158.5% higher than the gate breakdown voltage of the Conv-HEMT (11.1V) and a lower gate leakage current of six orders of magnitude than the Conv-HEMT at the gate-to-source voltage of 10V. The proposed JBS-HEMT exhibits a positive threshold voltage (1.68V) and excellent threshold voltage stability, and the maximum threshold voltage drift of the JBS-HEMT (+0.237V) is smaller than that of the Conv-HEMT (-0.714V) under gate stress conditions. The peak transconductance of the JBS-HEMT (186mS/mm) at athe drain-to-source voltage of 10V showed almost no reduction compared to the Conv-HEMT (189mS/mm), which solves the problem of decreased transconductance capability of the reported GaN HEMT with a p-n junction gate (PNJ-HEMT). It was confirmed that the JBS-HEMT has excellent gate stability and potential for power electronics applications.

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“…GaN-based high electron mobility transistors (HEMTs) are increasingly widely used in power electronics applications, owing to the excellent material properties such as high carrier mobility and high critical breakdown field. [1][2][3][4][5][6][7][8] The GaN power devices are the important candidates for next generation power conversion applications. Enhancement-mode (E-mode) HEMT is significant for the power application which can reduce power loss by keeping the device closed at zero gate bias.…”

Section: Introductionmentioning

confidence: 99%

Reverse Blocking Enhancement‐Mode AlGaN/GaN HEMTs with Hybrid p‐GaN Ohmic Drain on the Si Substrates

Zhao,

Ren,

Luo

et al. 2023

Physica Status Solidi (a)

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Hybrid p‐GaN Ohmic drain reverse blocking high electron mobility transistors (RB‐HEMTs) and conventional p‐GaN Enhancement‐mode (E‐mode) HEMTs are designed and fabricated on the Si substrates. Compared with the conventional p‐GaN HEMT, the RB‐HEMT can achieve great reverse blocking capability. The forward and reverse blocking voltages of the RB‐HEMT are 1116 V and 1056 V and the turn‐on voltage of the device is 1.07 V. When the temperature rises from 25 °C to 150 °C, the turn‐on voltage of the RB‐HEMT increases from 1.07V to 1.10 V, and the Vth increases from 1.97V to 2.07 V. The difference in turn‐on voltage and threshold voltage is mainly due to the different metals in contact between the gate and drain electrodes and p‐GaN. The reverse leakage current of the RB‐HEMT is 1.16 × 10−1 mA mm−1 when the temperature is 150 °C, which still keep good reverse blocking ability at high temperatures.

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High Threshold Voltage Enhancement-Mode Regrown p-GaN Gate HEMTs With a Robust Forward Time-Dependent Gate Breakdown Stability

Cited by 17 publications

References 13 publications

Stable High Temperature Operation of p-GaN Gate HEMT With Etch-Stop Layer

Stable High Temperature Operation of p-GaN Gate HEMT With Etch-Stop Layer

Design optimization of wide-gate swing E-mode GaN HEMTs with junction barrier Schottky gate

Reverse Blocking Enhancement‐Mode AlGaN/GaN HEMTs with Hybrid p‐GaN Ohmic Drain on the Si Substrates

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