2021
DOI: 10.1109/jiot.2021.3058015
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High-Throughput, Area-Efficient, and Variation-Tolerant 3-D In-Memory Compute System for Deep Convolutional Neural Networks

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Cited by 16 publications
(10 citation statements)
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“…The conductance nonlinearity of many nonvolatile memories inevitably leads to the need to implement a weight update (the analog conductance modulation) with nonidentical pulse programming (NPP) because the pulse widths or amplitudes are adjusted to compensate for the nonlinear conductance change as the analog memory states change . In addition, to minimize the data encoding (quantization) error, the NPP mode requires high-resolution digital-to-analog converters (DACs) to produce a range of pulse amplitudes, leading to increased energy consumption and area penalties in circuits . In contrast, an ideal analog memory provides a linear conductance change with identical pulse programming (IPP).…”
Section: Results and Discussionmentioning
confidence: 99%
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“…The conductance nonlinearity of many nonvolatile memories inevitably leads to the need to implement a weight update (the analog conductance modulation) with nonidentical pulse programming (NPP) because the pulse widths or amplitudes are adjusted to compensate for the nonlinear conductance change as the analog memory states change . In addition, to minimize the data encoding (quantization) error, the NPP mode requires high-resolution digital-to-analog converters (DACs) to produce a range of pulse amplitudes, leading to increased energy consumption and area penalties in circuits . In contrast, an ideal analog memory provides a linear conductance change with identical pulse programming (IPP).…”
Section: Results and Discussionmentioning
confidence: 99%
“…Applying in-memory computing to address the challenges of the central processing unit (CPU) latency and energy constraints of memory access is gaining attention for next-generation computing architectures. , Ferroelectric field-effect transistors (FeFETs) are promising three-terminal devices for in-memory computing due to their analog memory states, faster operation speed, lower energy consumption, and no read–disturb issue in comparison to two terminal memristors, such as resistive random access memory . The structure of a FeFET contains a semiconductor material as the channel layer and a ferroelectric material as the gate dielectric layer.…”
Section: Introductionmentioning
confidence: 99%
“…At the moment, the main efforts of researchers and engineers are focused on the co-optimization of memristive materials and devices in accordance with the requirements for specific emerging systems and technologies. Three-dimensional integration of memristive devices is a promising way to the development of future ultralarge neuromorphic integrated circuits that can approach the capabilities of the human brain (Veluri, Li, Niu, Zamburg, & Thean, 2021). An important role on this way is played by the implementation of a systematic approach to the development of the entire chain of computer-aided design (CAD) tools from devices to algorithms and hybrid software-hardware simulation systems discussed in Section 3.3.…”
Section: Hardware Implementationmentioning
confidence: 99%
“…To break the so-called “von Neumann bottleneck”, , adjacent or syncretic architectures of memory and processor are being explored, such as memory hierarchy, near-memory computation, , and in-memory computing. , In-memory computing, which is analogous to the biological brain, , utilizes in situ memory and computation to dramatically improve energy and processing efficiency for data-intensive and complex logic applications. …”
Section: Introductionmentioning
confidence: 99%