High-voltage devices for 0.5-μm standard CMOS technology

Bassin, C.; Ballan, Hussein; Declercq, M.

doi:10.1109/55.817446

Cited by 14 publications

(5 citation statements)

References 8 publications

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“…The traditional design solution adopts LDO with power transistor of DMOS to finish the high to low voltage conversion. In general, the area of DMOS is larger than normal MOS [2,3] . Furthermore, traditional power supply transform technique needs no less than three circuit blocks.…”

Section: Analysis Of Feasibility For the Proposed Design 21 Tradition...mentioning

confidence: 96%

A novel on-chip high to low voltage power conversion circuit

Wang

Lai

et al. 2009

J. Semicond.

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A novel power supply transform technique for high voltage IC based on the TSMC 0.6 μm BCD process is achieved. An adjustable bandgap voltage reference is presented which is different from the traditional power supply transform technique. It can be used as an internal power supply for high voltage IC by using the push-pull output stage to enhance its load capability. High-order temperature compensated circuit is designed to ensure the precision of the reference. Only 0.01 mm2 area is occupied using this novel power supply technique. Compared with traditional technique, 50% of the area is saved, 40% quiescent power loss is decreased, and the temperature coefficient of the reference is only 4.48 ppm/°C. Compared with the traditional LDO (low dropout) regulator, this power conversion architecture does not need external output capacitance and decreases the chip-pin and external components, so the PCB area and design cost are also decreased. The testing results show that this circuit works well.

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Section: Analysis Of Feasibility For the Proposed Design 21 Tradition...mentioning

confidence: 96%

A novel on-chip high to low voltage power conversion circuit

Wang

Lai

et al. 2009

J. Semicond.

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“…The breakdown voltages of regular devices in the standard 0.35 µm CMOS technology that the wafer is fabricated in are less than 10 V. To achieve higher pulse voltages, a high-voltage NMOS based on an “Extended Drain” design approach is used [31]. Fig.…”

Section: Single-chip System For Fl-ivusmentioning

confidence: 99%

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging

Gurun

Tekeş

Zahorian

et al. 2014

IEEE Trans. Ultrason., Ferroelect., Freq. Contr.

155

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Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of CMUT arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-µm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-µm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single-chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex-vivo chicken heart sample. The measured axial and lateral point resolutions are 92 µm and 251 µm, respectively. We successfully acquired volumetric imaging data from the ex-vivo chicken heart with 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce real-time volumetric images with image quality and speed suitable for catheter based clinical applications.

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“…This maximizes the drain current. The structure shown in figure 13(a) also utilizes gate field plates to maximize drain voltage swing as known from Si and SiC power FET technologies [25,26]. Figure 13(b) shows a SEM micrograph of a fabricated recessed gate JFET with gate field plates.…”

Section: Boron Delta-doped Channel Jfetmentioning

confidence: 99%

Diamond diodes and transistors

Aleksov

Denisenko

Kunze

et al. 2003

Semicond. Sci. Technol.

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Over the past few years a variety of diamond electron devices have been fabricated, analysed and simulated. This includes Schottky diodes on boron-doped p + diamond substrates, boron/nitrogen pn-junction diodes, bipolar transistors based on this pn-junction and field effect transistors (FETs) with boron delta-doped channels and hydrogen-related surface conductive layers. Many of the fabricated devices considered here represent the current state-of-the-art in this field. This includes the operation of diamond Schottky diodes at temperatures of up to 1000 • C, as well as diamond FET devices with a cut-off frequency of 30 GHz and channel current densities of 300 mA mm −1 . Simulations show that diamond boron delta-doped FETs might yield an RF-output power density of up to 30 W mm −1 .

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High-voltage devices for 0.5-μm standard CMOS technology

Cited by 14 publications

References 8 publications

A novel on-chip high to low voltage power conversion circuit

A novel on-chip high to low voltage power conversion circuit

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging

Diamond diodes and transistors

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