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This paper presents a new family of highvoltage (HV) analog and digital circuits which arefully compatible with a standard 5V CMOS technology, without any process change. On the basis of several circuits, it is shown that HV design can be classified in three categories, for which a common design methodology can be identified. Detailed circuit sizing as well as measurements illustrate the performance achieved with this technique.

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The feasibility of the smart voltage extension (SVX) technique featuring complementary high-voltage devices without any modifications of the process steps of an 0.5-m standard CMOS technology is discussed here. This letter focuses on the optimization of the breakdown voltage of the HVNMOS as well as the possible implementation of the HVPMOS. Different high-voltage options with increasing process modification steps are discussed as a function of the required high-voltage capabilities.

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