Highly linear high isolation SPDT switch IC with back-gate effect and floating body technique in 180-nm CMOS

Xiao-li, XU; Yang, Xin; Sun, Zheng; Kurniawan, Taufiq Alif; Yoshimasu, Toshihiko

doi:10.1109/rfit.2015.7377902

Cited by 5 publications

(2 citation statements)

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“…A transmit/receive (T/R) switch can be adopted to realize a single antenna sharing between the Tx and Rx in MMW transceivers for time division duplex (TDD) communication systems. [1][2][3] In addition, a switch can also reduce the chip area, thus bringing about a more compact solution for MMW systems. Therefore, the switch shows great demand and is an essential component in MMW 5G systems for TDD application.…”

Section: Introductionmentioning

confidence: 99%

“…In recent years, the development of the 5 G communication technology has greatly improved the data transmission rate, and also accelerated the development and application of millimeter wave (MMW) systems. A transmit/receive (T/R) switch can be adopted to realize a single antenna sharing between the Tx and Rx in MMW transceivers for time division duplex (TDD) communication systems 1–3 . In addition, a switch can also reduce the chip area, thus bringing about a more compact solution for MMW systems.…”

Section: Introductionmentioning

confidence: 99%

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High isolation and high power of 0.13 µm CMOS SPDT switch using deep‐N‐well transistors and floating‐body technique in K‐band

Wang

Cheng

Wei

et al. 2023

Micro & Optical Tech Letters

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A K‐band high isolation single‐pole double‐throw (SPDT) switch using a 0.13 µm CMOS process is presented. Two on‐state resistors of shunt Deep‐N‐Well (DNW) transistors are used to improve isolation. The floating‐body technique is utilized to enhance the power‐handling capability. The off‐state capacitors of two DNW transistors are employed to construct an impedance‐matching network. The switch achieves a measured insertion loss of 3.0–3.2 dB and an isolation of better than 35 dB from 17 to 27 GHz. A measured input 1 dB compression power (IP1dB) of 11.8 dBm is obtained at 24 GHz. The chip size of the proposed switch is 0.52 × 0.66 mm2 with a core area of only 0.33 × 0.27 mm2.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%