Highly suppressed boron penetration in NO-nitrided SiO/sub 2/ for p/sup +/-polysilicon gated MOS device applications

Abstract

Absfruct-In this paper, we demonstrate the superior diffusion barrier properties of NO-nitrided SiOn in suppressing boron penetration for p+-polysilicon gated MOS devices. Boron penetration effects have been studied in terms of flatband voltage shift, decrease in inversion capacitance (due to polysilicon depletion effect), impact on interface state density, and chargeto-breakdown. Results show that NO-nitrided SiOz, as compared to conventional thermal SiOz, exhibit much higher resistance to boron penetration, and therefore, are very attractive for surface channel PMOS technology.N deep-submicrometer CMOS technology, p+-polysilicon I as the gate material for p-channel MOSFET is required to improve short-channel behavior [ 11, [2]. Unfortunately, boron diffusion from heavily doped p+-polysilicon through the thin gate oxide and into the underlying channel region can cause undesirable degradation of device operation, including instability in threshold voltage control, increase in charge trapping rate, decrease in low-field mobility [3], [4], and reduced current drivability due to polysilicon depletion in p-MOSFET's [5]. Previous studies have shown that "3-nitrided oxides and NZO-based oxides can suppress boron penetration [6]-[ IO]. However, "3-nitrided oxides suffer from hydrogen-related electron trapping problems [ 111 and NZO-based oxides require a much higher thermal budget for sufficient nitrogen concentration ([NI) to effectively suppress boron penetration 171. In this letter, we report the use of rapid thermal NO-nitrided Si02 as an alternate oxynitride with enhanced boron diffusion barrier properties while maintaining a low thermal budget and H-free nature of the processing ambient. The applicability of RTP NO-nitrided Si02 as gate dielectric in n+-poly gated MOSFET's has been recently demonstrated [12]. In this study, we examine the effects of boron penetration on flatband voltage (Vh), inversion capacitance (due to polysilicon depletion effect), interface state density (Dit), and charge-to-breakdown ( QBD) characteristics for p+-poly gated MOS devices. were fabricated on 10-15 0-cm, n-typeSi ( 100) substrates. All oxidation and nitridation processes were performed in a rapid thermal processing (RTP) system at 1 atm. Thermal oxides grown at 1050°C in pure 0 2 were used as control samples. Some samples then received in situ nitridation at 1000°C for 10 or 100 s in pure NO ambient. All samples finally received an in situ N2 anneal at 1050°Cfor 20 s. Undoped polysilicon with a thickness of 4000 8, was deposited by LPCVD at 625°C followed by BFz implants at 20 KeV with a dose of 5.5 x 1015 cm-'. Before the patterning of polysilicon, furnace N2 annealing for 30 min. at different temperatures (850, 900, and 950°C) was used to activate and redistributed the implanted boron. The final oxide thicknesses (measured by C-V) were -55 and -57A for control and the two NO-nitrided oxides, respectively.SIMS measurement (Fig. 1) reveals that the peak nitrogen concentration at the SiOz/Si interface for 1000°C/lOO s and 1000°C/...

Physicochemical Characterization of Annealed PolySi/NIDOS/SiO2 Structures

“…[4][5][6][7][8] Nitridation processes have been proposed to reduce the boron penetration into the gate oxide, such as nitrogen implantation, NH 3 , N 2 O, and NO annealing. [9][10][11] In previous works, we have proposed an original solution by the insertion of a nitrogen-doped layer (NIDOS) between the polySi gate and the insulator. [12] The main advantages of this two-layer gate engineering approach are controlling the nitrogen concentration in the 4-nm-thick NIDOS layer during the LPCVD deposition and the large grain size of the amorphous as-deposited silicon film at low temperature with disilane gas source.…”

Inductive-coupling-nitrogen-plasma process for suppression of boron penetration in BF2+-implanted polycrystalline silicon gate

“…Nitridation of the gate oxide is feasible. [9][10][11][12] This can be achieved by nitridation of the gate and/or gate oxide using N 2 O, NO oxidation or annealing, which a nitrogen layer was found to incorporate at the SiO 2 /Si interface as a barrier to retard the boron diffusion. 12 In this letter, a novel and simple process of building the nitrogen diffusion barrier between the oxide and poly-Si was developed by using an inductivecoupling-nitrogen-plasma ͑ICNP͒ process.…”

“…Many methods have been proposed to suppress boron penetration. [6][7][8][9][10][11][12] The first way is to retard the boron diffusion inside the poly-Si. The stacked or modified structures of the poly-Si gate have been proposed.…”

Enhanced hot-hole degradation in P/sup +/-poly PMOSFETs with oxynitride gate dielectrics

“…It has been shown that when nitrogen is incorporated into the gate oxide, its concentration peaks at the SiOz/Si interface [1][2][3][4]. This nitrogen-rich layer has higher dielectric constant and smaller bandgap than the bulk Si02 [5].…”