2022
DOI: 10.1007/s10854-022-09347-7
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Highly transparent PZT capacitors on glass obtained by layer transfer process

Abstract: Transparent ITO/PZT/ITO capacitors were fabricated on 200 mm glass substrate. The PZT films of 1 µm and 2 µm thickness were first grown on platinized Si wafer by sol-gel method, and then transferred onto glass substrate together with ITO electrodes following an innovative process. The obtained PZT based stacks on glass show an average transmission of about 70 % in the visible range. PZT films keep their preferred (100) orientation after transfer process. The capacitors exhibit ferroelectric, dielectric and pie… Show more

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Cited by 6 publications
(6 citation statements)
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“…The TPMs are electrically connected to probe contacts on the fixed part of the chip via tungsten vias and a single layer of aluminum tracks. Following the completion of the photonic wafer fabrication, a PZT layer, prepared separately (so as not to exceed the thermal budget of the photonics technology) using a sol-gel technique on a 200 mm silicon wafer, is transferred to the photonic circuit using Au/Au wafer-to-wafer bonding 35 , 36 . The donor substrate is removed and the PZT layer is patterned 36 , 37 before the creation of electrical tracks and surface contact pads in order to apply a vertical electric field (in y ).…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…The TPMs are electrically connected to probe contacts on the fixed part of the chip via tungsten vias and a single layer of aluminum tracks. Following the completion of the photonic wafer fabrication, a PZT layer, prepared separately (so as not to exceed the thermal budget of the photonics technology) using a sol-gel technique on a 200 mm silicon wafer, is transferred to the photonic circuit using Au/Au wafer-to-wafer bonding 35 , 36 . The donor substrate is removed and the PZT layer is patterned 36 , 37 before the creation of electrical tracks and surface contact pads in order to apply a vertical electric field (in y ).…”
Section: Resultsmentioning
confidence: 99%
“…Following the completion of the photonic wafer fabrication, a PZT layer, prepared separately (so as not to exceed the thermal budget of the photonics technology) using a sol-gel technique on a 200 mm silicon wafer, is transferred to the photonic circuit using Au/Au wafer-to-wafer bonding 35 , 36 . The donor substrate is removed and the PZT layer is patterned 36 , 37 before the creation of electrical tracks and surface contact pads in order to apply a vertical electric field (in y ). Finally the cantilever was created by selectively etching the SiO 2 around and beneath the desired cantilever shape (more details in the methods section).…”
Section: Resultsmentioning
confidence: 99%
“…The technological process that allows transferring of piezoelectric PZT film stacks from silicon substrate to any other substrate is depicted in Figure 1 [1]. High quality PZT film is first grown on platinized Si wafer.…”
Section: Methodsmentioning
confidence: 99%
“…The TPMs are electrically connected to probe contacts on the fixed part of the chip via tungsten vias and a single layer of aluminium tracks. Following the completion of the photonic wafer fabrication, a PZT layer, prepared using a sol-gel technique on a 200mm silicon wafer, is transferred to the photonic circuit using Au/Au wafer-to-wafer bonding [32,33]. The donor substrate is removed and the PZT layer is patterned [33,34] before electrical tracks and surface contact pads were created in order to apply a vertical electric field (in y).…”
Section: Circuit Architecture and Operating Principlementioning
confidence: 99%
“…Following the completion of the photonic wafer fabrication, a PZT layer, prepared using a sol-gel technique on a 200mm silicon wafer, is transferred to the photonic circuit using Au/Au wafer-to-wafer bonding [32,33]. The donor substrate is removed and the PZT layer is patterned [33,34] before electrical tracks and surface contact pads were created in order to apply a vertical electric field (in y). Finally the cantilever was created by selectively etching the SiO2 around and beneath the desired cantilever shape (more details in the methods section).…”
Section: Circuit Architecture and Operating Principlementioning
confidence: 99%