Hot-Carrier Reliability of High Side NDMOS in Smart Power SOI Technologies

In this paper, we describe the temperature dependence of the hot carrier effect and positive bias temperature instability (PBTI) of a thin-film silicon-on-insulator (SOI) power MOSFET at high temperature. Device degradation, which is caused by the hot carrier effect and PBTI, depends on temperature and it is different under the stress gate bias condition. Device degradation caused by the hot carrier effect occurs at a low stress gate voltage and that caused by PBTI occurs at a high stress gate voltage. The degradation of on-resistance is suppressed as temperature increases at a low stress gate voltage. The threshold voltage shift is maximum when temperature is 473 K at a low stress gate voltage. The degradation of on-resistance and the threshold voltage shift enhance with increasing temperature at a high stress gate voltage.

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Hot-Carrier Reliability of High Side NDMOS in Smart Power SOI Technologies

Cited by 2 publications

References 4 publications

Hot carrier effect of a scaled thin-film silicon-on-insulator power metal oxide semiconductor field-effect transistor under constant drain electric field

Hot carrier effect of a scaled thin-film silicon-on-insulator power metal oxide semiconductor field-effect transistor under constant drain electric field

Hot carrier effect and positive bias temperature instability of a thin-film silicon-on-insulator power MOSFET at high temperature

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